Abstract: An antenna assembly comprising an antenna. The antenna includes: a substrate including a first surface and a second surface arranged opposite to each other; a first radiator disposed at the first surface and including two first radiation elements spaced apart from each other and connected to each other by a connector; and a second radiator disposed at the second surface and including a second radiation element disposed at an area of the second surface corresponding to an area of the first surface between the two first radiation elements. Each of the two first radiation elements and the second radiation element includes a current adjustment structure configured to adjust a current flow direction in the radiation element to which the current adjustment structure belongs.

Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.

Abstract: The present disclosure relates to a magneto-resistive random access memory (MRAM) cell having an extended upper electrode, and a method of formation. In some embodiments, the MRAM cell has a magnetic tunnel junction (MTJ) arranged over a conductive lower electrode. A conductive upper electrode is arranged over the magnetic tunnel junction. Below the conductive lower electrode is a first conductive via structure in a first dielectric layer. Below the conductive via structure is a discrete conductive jumper structure in a second dielectric layer. A dielectric body of a third dielectric material that is different from the first dielectric material and the second dielectric material extends vertical from the first dielectric layer at least partially into the second dielectric layer.

Abstract: Embodiments of the present invention provide a human-machine interaction method, including: detecting and collecting, by a robot, sensing information of a companion object of a target object and emotion information of the target object that is obtained when the target object interacts with the companion object; extracting, by the robot, an emotion feature quantity based on the emotion information, determining, based on the emotion feature quantity, an emotional pattern used by the target object to interact with the companion object, determining, based on the emotional pattern, a degree of interest of the target object in the companion object, extracting behavioral data of the companion object from the sensing information based on the degree of interest, and screening the behavioral data to obtain simulated object data; and simulating, by the robot, the companion object based on the simulated object data.

Abstract: The present disclosure relates to a magneto-resistive random access memory (MRAM) cell having an extended upper electrode, and a method of formation. In some embodiments, the MRAM cell has a magnetic tunnel junction (MTJ) arranged over a conductive lower electrode. A conductive upper electrode is arranged over the magnetic tunnel junction. Below the conductive lower electrode is a first conductive via structure in a first dielectric layer. Below the conductive via structure is a discrete conductive jumper structure in a second dielectric layer. A dielectric body of a third dielectric material that is different from the first dielectric material and the second dielectric material extends vertical from the first dielectric layer at least partially into the second dielectric layer.

Abstract: A data processing method and apparatus are disclosed. In various embodiments, R groups of proposal region sequences are obtained. Each group of proposal region sequence includes a plurality of proposal regions. In those embodiments, a VRPAC instruction is invoked to calculate an area of each proposal region in each group of proposal region sequence. For a jth group of proposal region sequence in the R groups of proposal region sequences, a VIOU instruction and a VAADD instruction are invoked to determine j suppression matrices of the jth group of proposal region sequence and determine a suppression vector of the jth group of proposal region sequence based on the j suppression matrices. In those embodiments, an unsuppressed proposal region is determined based on a suppression vector of each group of proposal region sequence.

Abstract: A memory cell with dual sidewall spacers and its manufacturing methods are provided. In some embodiments, the memory cell includes a bottom electrode disposed over a substrate, a resistance switching dielectric disposed over the bottom electrode and having a variable resistance, and a top electrode disposed over the resistance switching dielectric. The memory cell further includes a first sidewall spacer disposed on an upper surface of the bottom electrode and extending upwardly alongside the resistance switching dielectric and the top electrode. The memory cell further includes a second sidewall spacer having a bottom surface disposed on the upper surface of the bottom electrode and directly and conformally lining the first sidewall spacer.

Abstract: The present invention in the field of data calculation technologies, discloses an operation accelerator, to reduce time for performing a multiplication operation on two N*N matrices. The operation accelerator includes: a first memory, a second memory, an operation circuit, and a controller. The operation circuit performs data communication with the first memory and the second memory by using a bus. The operation circuit is configured to: extract matrix data from the first memory and the second memory, and perform a multiplication operation. The controller is configured to control, according to a preset program or instruction, the operation circuit to complete the multiplication operation. The operation accelerator is configured to perform a multiplication operation on two matrices.

Abstract: A metal surface treatment liquid recycling system includes a treatment liquid collecting tank, a pre-treatment device, a nanofiltration device and a vacuum distillation device, all of which are connected sequentially. The nanofiltration device includes a feed tank, a first-stage nanofiltration membrane unit, and a second-stage nanofiltration membrane unit. Treatment wastewater in the treatment liquid collecting tank is fed into the pre-treatment device to filter out suspended solids and then enter the feed tank. The wastewater in the feed tank is filtered by the first-stage nanofiltration membrane unit and transformed to a first-stage concentrated waste liquid and first-stage infiltration fluids. The first-stage infiltration fluids are fed into and re-filtered by the second-stage nanofiltration membrane unit and transformed to a second-stage concentrated waste liquid and second-stage infiltration fluids.

Abstract: A media transport includes a feed roller to be rotated in a first direction, and an input/output roller to be rotated in the first direction to direct media into a media path with rotation of the feed roller in the first direction, where the feed roller is to be rotated in a second direction opposite the first direction to advance the media within the media path and, with the rotation of the feed roller in the second direction, the input/output roller is to be temporarily decoupled from rotation with the feed roller.

Abstract: The present invention provides a robot control method, and the method includes: collecting interaction information of a companion target, and obtaining digital person information of a companion person (101), where the interaction information includes interaction information of a sound or an action of the companion target toward the robot, and the digital person information includes a set of digitized information of the companion person; and determining, by using the interaction information and the digital person information, a manner of interacting with the companion target (103); generating, based on the digital person information of the companion person and by using a machine learning algorithm, an interaction content corresponding to the interaction manner (105); and generating a response action toward the companion target based on the interaction manner and the interaction content (107).

Abstract: The present invention relates to the field of data calculation technologies, and discloses an operation accelerator, to reduce time for performing a multiplication operation on two N*N matrices. The operation accelerator includes: a first memory, a second memory, an operation circuit, and a controller. The operation circuit may perform data communication with the first memory and the second memory by using a bus. The operation circuit is configured to: extract matrix data from the first memory and the second memory, and perform a multiplication operation. The controller is configured to control, according to a preset program or instruction, the operation circuit to complete the multiplication operation. The operation accelerator may be configured to perform a multiplication operation on two matrices.

Abstract: The present disclosure relates to a magneto-resistive random access memory (MRAM) cell having an extended upper electrode, and a method of formation. In some embodiments, the MRAM cell has a magnetic tunnel junction (MTJ) arranged over a conductive lower electrode. A conductive upper electrode is arranged over the magnetic tunnel junction. Below the conductive lower electrode is a first conductive via structure in a first dielectric layer. Below the conductive via structure is a discrete conductive jumper structure in a second dielectric layer. A dielectric body of a third dielectric material that is different from the first dielectric material and the second dielectric material extends vertical from the first dielectric layer at least partially into the second dielectric layer.

Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.

Abstract: The present disclosure relates to a magneto-resistive random access memory (MRAM) cell having an extended upper electrode, and a method of formation. In some embodiments, the MRAM cell has a magnetic tunnel junction (MTJ) arranged over a conductive lower electrode. A conductive upper electrode is arranged over the magnetic tunnel junction. Below the conductive lower electrode is a first conductive via structure in a first dielectric layer. Below the conductive via structure is a discrete conductive jumper structure in a second dielectric layer. A dielectric body of a third dielectric material that is different from the first dielectric material and the second dielectric material extends vertical from the first dielectric layer at least partially into the second dielectric layer.

Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.

Abstract: The present application is in the field of data calculation technologies, and discloses an operation accelerator, to reduce time for performing a multiplication operation on two N*N matrices. The operation accelerator includes: a first memory, a second memory, an operation circuit, and a controller. The operation circuit performs data communication with the first memory and the second memory by using a bus. The operation circuit is configured to: extract matrix data from the first memory and the second memory, and perform a multiplication operation. The controller is configured to control, according to a preset program or instruction, the operation circuit to complete the multiplication operation. The operation accelerator is configured to perform a multiplication operation on two matrices.

Abstract: Various embodiment provide a multi-terminal cooperative working method, a terminal device, and a multi-terminal cooperative system. In those embodiments, a primary device can send networking information to a plurality of secondary devices, and the primary device has a permission to manage the cooperative network. The primary device can receive networking confirmation information sent by the plurality of secondary devices; and send configuration information to the plurality of secondary devices separately. The configuration information can be used to instruct to switch, based on a preset management permission switching mechanism when the primary device becomes abnormal or the primary device exits from the cooperative network, the permission to manage the cooperative network. The primary device can clear the secondary device from the cooperative network the secondary device becomes abnormal. In this way, robustness of the cooperative network can be improved.

Abstract: A method for manufacturing a memory device is provided. The method includes forming a bottom electrode layer, a resistance switching element layer over the bottom electrode layer, and a top electrode layer over the resistance switching element layer; patterning the top electrode layer into a top electrode; forming a protection spacer on a sidewall of the top electrode; patterning the resistance switching element layer into a resistance switching element after forming the protection spacer; and patterning the bottom electrode layer into a bottom electrode after patterning the resistance switching element layer.

Abstract: A method for presenting an object based on a biometric feature includes obtaining information about a first object that a user is gazing at, and biometric feature information of the user gazing at the first object; recognizing a satisfaction status for the obtained biometric feature information of the user gazing at the first object; and determining and presenting information about a second object based on the recognition of the satisfaction status for the biometric feature information of the user gazing at the first object.