Patents by Inventor Heng Liu

Heng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124163
    Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
  • Patent number: 11959455
    Abstract: Provided are control method and device of an energy-storage coordinated floating wind turbine, relating to the technical field of wind turbines. The control method of an energy-storage coordinated floating wind turbine can construct a primary frequency regulation model of a floating wind farm based on a frequency response unit, construct a second frequency regulation model according to an energy storage system, further construct, according to the primary frequency regulation model and the second frequency regulation model, a frequency regulation model of a hybrid power system containing the floating wind farm, the energy storage system, and a pre-set thermal power unit, and design an overall frequency regulation control strategy of the hybrid power system based on the frequency regulation model of the hybrid power system.
    Type: Grant
    Filed: April 6, 2023
    Date of Patent: April 16, 2024
    Assignees: NORTH CHINA ELECTRIC POWER UNIVERSITY, HUANENG GROUP R &D CENTER CO LTD
    Inventors: Yang Hu, Ziqiu Song, Fang Fang, Jizhen Liu, Xiaojiang Guo, Qinghua Wang, Heng Ge
  • Publication number: 20240115151
    Abstract: A physiological signal measurement system, a physiological signal measurement method, and a mobile device protective case are provided. The physiological signal measurement system includes a first electrode, a second electrode, a reference electrode, an impedance front-end circuit module and a dynamic signal matching module. The first electrode, the second electrode and the reference electrode are used to obtain a first sensing signal and a second sensing signal. The impedance front-end circuit module is used to detect a first impedance of the first electrode and a second impedance of the second electrode, and obtain an original differential signal according to the first sensing signal and the second sensing signal. The dynamic signal matching module is used to obtain a calibration sequence according to the first impedance, the second impedance and the original differential signal, and obtain a compensated calibration sequence according to the calibration sequence and the original differential signal.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 11, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yun-Yi HUANG, Yu-Chiao TSAI, Chun LIU, Heng-Yin CHEN
  • Publication number: 20240116900
    Abstract: Provided are crystalline forms of a KRAS G12C inhibitor compound and to processes for their preparation. Furthermore, provided is pharmaceutical composition comprising said crystalline forms, and at least one pharmaceutically acceptable excipient. The pharmaceutical composition can be used as a medicament, in particular for the treatment of cancer, and KRAS G12C-mutant cancer.
    Type: Application
    Filed: October 29, 2021
    Publication date: April 11, 2024
    Inventors: Simona COTESTA, Heng GE, Marc GERSPACHER, Catherine LEBLANC, Bo LIU, Edwige Liliane Jeanne LORTHIOIS, Rainer MACHAUER, Robert MAH, Tanja MEISTER, Christophe MURA, Pascal RIGOLLIER, Nadine SCHNEIDER, Stefan STUTZ, Andrea VAUPEL, Nicolas WARIN, Rainer WILCKEN, Lijun XUE, Marie-Anne LOZAC'H, Ross STRANG
  • Patent number: 11955524
    Abstract: The present application discloses a semi-floating gate device. A floating gate structure covers a selected area of a first well region and is used to form a conductive channel. The floating gate structure further covers a surface of a lightly doped drain region, and a floating gate material layer and the lightly doped drain region contact at a dielectric layer window to form a PN structure. A source region is self-aligned with a first side surface of the floating gate structure. A first control gate is superposed on a top of the floating gate structure. A second control gate is disposed on a surface of the lightly doped drain region between the drain region and a second side surface of the floating gate structure. The first control gate and the second control gate are isolated by an inter-gate dielectric layer.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: April 9, 2024
    Assignee: Shanghai Huali Integrated Circuit Corporation
    Inventors: Heng Liu, Jianghua Leng, Zhigang Yang, Tianpeng Guan
  • Publication number: 20240111191
    Abstract: The present disclosure provides a display substrate, including an array substrate, a color filter substrate, and a liquid crystal layer and a sealant arranged therebetween. A sealing cavity for receiving the liquid crystal layer is defined by the sealant, the array substrate and the color filter substrate. The display substrate is provided with a bonding side surface bonded to a chip on film, the sealant at least includes a first portion including a first side surface and a second side surface flush with the bonding side surface. The array substrate includes a display region and a non-display region surrounding the display region. A bonding pin is provided in the non-display region, extends to a side surface of the display substrate, and is exposed to the outside. The present disclosure further provides a method for manufacturing the display substrate, a display motherboard, and a display device.
    Type: Application
    Filed: April 29, 2021
    Publication date: April 4, 2024
    Inventors: Jiarong LIU, Heng WANG, Zhixiao YAO
  • Publication number: 20240113414
    Abstract: Disclosed is an electronic device including a device body and an antenna module. The antenna module includes a conductive element and at least one antenna element. The conductive element includes a main body portion and at least one assembly portion connected with each other. The at least one assembly portion is assembled on the device body. The at least one antenna element is disposed on the device body and coupled with the conductive element to excite a first resonance mode. The at least one assembly portion overlaps the at least one antenna element in the length direction of the main body portion.
    Type: Application
    Filed: September 24, 2023
    Publication date: April 4, 2024
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Chih-Heng Lin, Li-Chun Lee, Shih-Chia Liu, Jui-Hung Lai, Hung-Yu Yeh
  • Patent number: 11947538
    Abstract: A method for processing a plurality of queries is provided according to embodiments of the present disclosure. In this method, based on a plurality of queries and an execution plan for the plurality of quires, a plurality of record identification (ID) numbers can be stored into a pool in a numerical order. Each of the plurality of record ID numbers can identify a data record in a database. Then, the execution plan can be performed to batch a plurality of data records corresponding to the plurality of record ID numbers in the database based on a distribution of the plurality of record ID numbers in the pool.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: April 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Ke Wei Wei, Shuang Yu, Zhenyu Shi, Ji Gao Fu, Heng Liu
  • Publication number: 20240105644
    Abstract: A semiconductor die package includes a high dielectric constant (high-k) dielectric layer over a device region of a first semiconductor die that is bonded with a second semiconductor die in a wafer on wafer (WoW) configuration. A through silicon via (TSV) structure may be formed through the device region. The high-k dielectric layer has an intrinsic negative charge polarity that provides a coupling voltage to modify the electric potential in the device region. In particular, the electron carriers in high-k dielectric layer attracts hole charge carriers in device region, which suppresses trap-assist tunnels that result from surface defects formed during etching of the recess for the TSV structure. Accordingly, the high-k dielectric layer described herein reduces the likelihood of (and/or the magnitude of) current leakage in semiconductor devices that are included in the device region of the first semiconductor die.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 28, 2024
    Inventors: Tsung-Hao YEH, Chien Hung LIU, Hsien Jung CHEN, Hsin Heng WANG, Kuo-Ching HUANG
  • Publication number: 20240106104
    Abstract: An electronic device includes a device body and an antenna module disposed in the device body and including a conductive structure and a coaxial cable including a core wire, a shielding layer wrapping the core wire, and an outer jacket wrapping the shielding layer. The conductive structure includes a structure body and a slot formed on the structure body and penetrating the structure body in a thickness direction of the structure body. A section of the shielding layer extends from the outer jacket and is connected to the structure body. A physical portion of the structure body and the section of the shielding layer are respectively located on two opposite sides of the slot in a width direction of the slot. A section of the core wire extends from the section of the shielding layer and overlaps the slot and the physical portion in the thickness direction.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 28, 2024
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Hung-Yu Yeh, Shih-Chia Liu, Yen-Hao Yu, Li-Chun Lee, Chih-Heng Lin, Jui-Hung Lai
  • Patent number: 11939268
    Abstract: A method of forming low-k material is provided. The method includes providing a plurality of core-shell particles. The core of the core-shell particles has a first ceramic with a low melting point. The shell of the core-shell particles has a second ceramic with a low melting point and a low dielectric constant. The core-shell particles are sintered and molded to form a low-k material. The shell of the core-shell particles is connected to form a network structure of a microcrystal phase.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Chuang Chiu, Tzu-Yu Liu, Tien-Heng Huang, Tzu-Chi Chou, Cheng-Ting Lin
  • Patent number: 11942372
    Abstract: In some embodiments, the present disclosure relates to a method for manufacturing an integrated chip. The method includes forming a transistor structure over a substrate. The transistor structure comprises a pair of source/drain regions and a gate electrode between the source/drain regions. A lower inter-level dielectric (ILD) layer is formed over the pair of source/drain regions and around the gate electrode. A gate capping layer is formed over the gate electrode. A selective etch and deposition process is performed to form a dielectric protection layer on the gate capping layer while forming a contact opening within the lower ILD layer. A lower source/drain contact is formed within the contact opening.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Da Huang, Hao-Heng Liu, Li-Te Lin
  • Publication number: 20240091494
    Abstract: The present invention provides a catheter reinforcement layer (100) and a catheter including the same. The catheter reinforcement layer (100) includes a braided component (110) and at least one axial component (120a, 120b, 120c, 120d, 120e, 120f, 120g, 120h, 120j, 120k, 120l, 120m, 120n). The braided component (110) is a mesh tube formed by braiding wires in a crosswise manner, and the axial component (120a, 120b, 120c, 120d, 120e, 120f, 120g, 120h, 120j, 120k, 120l, 120m, 120n) extends along the braided component (110) from a proximal end to a distal end, and has at least one intersection with the braided component (110).
    Type: Application
    Filed: January 11, 2022
    Publication date: March 21, 2024
    Inventors: Heng LIN, Yunyun LIU, Yuxi CUN, Li SUN
  • Publication number: 20240091495
    Abstract: A catheter reinforcement layer (100) and a catheter (10). The catheter reinforcement layer (100) includes a spring component (110) and at least one axial component (120). The at least one axial component (120) extends along the spring component (110) from a proximal end to a distal end, and has at least one intersection with the spring component (110). According to the catheter reinforcing layer (100), by introducing one or more axial components (120) into a reinforcing layer of an existing spring component (110), the axial modulus of the catheter (10) is increased, thereby avoiding axial deformation or even breakage of the tubular body of the catheter (10) due to axial force.
    Type: Application
    Filed: January 11, 2022
    Publication date: March 21, 2024
    Inventors: Heng LIN, Yunyun LIU, Yiqun Bruce WANG, Xueli LUO
  • Patent number: 11931799
    Abstract: A three-dimensional (3D) metal object manufacturing apparatus is equipped with a movable directed energy source to melt hardened metal drops and form an oxidation layer. A metal support structure can be formed over the oxidation layer, an object feature can be formed over the oxidation layer, or both a metal support structure and an object feature can be formed over oxidation layers located at opposite sides of a metal support structure. The oxidation layers weakly attach the metal support structure to the object feature supported by the metal support structure so the support structure can be easily removed after manufacture of the object is complete.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: March 19, 2024
    Assignee: Additive Technologies LLC
    Inventors: Paul J. McConville, Douglas K. Herrmann, Seemit Praharaj, Jason M. LeFevre, Chu-Heng Liu
  • Patent number: 11934481
    Abstract: Embodiments of the present invention disclose a matrix multiplier, and relate to the field of data computing technologies, so as to divide two matrices into blocks for computation. The matrix multiplier includes: a first memory, a second memory, an operation circuit, and a controller, where the operation circuit, the first memory, and the second memory may perform data communication by using a bus; and the controller is configured to control, according to a preset program or instruction, a first matrix and a second matrix to be divided into blocks, and control the operation circuit to perform a multiplication operation on corresponding blocks in the first memory and the second memory based on block division results of the controller. The matrix multiplier may be configured to perform a multiplication operation on two matrices.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: March 19, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Hu Liu, Heng Liao, Jiajin Tu, Honghui Yuan, Hou Fun Lam, Fan Zhu
  • Patent number: 11934712
    Abstract: A method of automatically diagnosing media handling defects on sheets, the method including receiving a first image of a first sheet, determining that the first image includes a detected media handling defect, determining that the detected media handling defect matches one or more known media handling defects in a database, and displaying a rectifying action.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: March 19, 2024
    Assignee: Xerox Corporation
    Inventors: Jason LeFevre, Douglas K. Herrmann, Chu-heng Liu, Seemit Praharaj
  • Publication number: 20240083165
    Abstract: A method of operating a printer identifies image areas in ink image content data that are likely to affected by airflow disturbances to produce ink blur within an ink image. Inkjets farthest from these areas are selected to eject ink drops into these areas to form portions of an ink image. The image areas identified as being likely to produce ink blur are the leading edge, trailing edge, and side edge of the ink image content data. The ink drops ejected by these selected inkjets and their satellites are less likely to be affected adversely by the airflow disturbances.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Seemit Praharaj, Jason M. LeFevre, Douglas K. Herrmann, Chu-Heng Liu, Jorge A. Alvarez
  • Publication number: 20240086139
    Abstract: A modular display system includes a processing unit configured to receive and decode video, at least two display segments connected together including a first display segment and a second display segment, where each display segment of the at least two display segments includes a controller and where a controller of the first display segment is communicatively coupled to the processing unit and configured to receive the decoded video, transmit the received decoded video to a second controller of the second display segment, extract a video segment for the first display segment, and cause display of the extracted video segment on the first display segment.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 14, 2024
    Inventors: Heng Liu, Erwin Bellers
  • Publication number: 20240088225
    Abstract: A method includes forming a gate stack on a first portion of a semiconductor substrate, removing a second portion of the semiconductor substrate on a side of the gate stack to form a recess, growing a semiconductor region starting from the recess, implanting the semiconductor region with an impurity, and performing a melt anneal on the semiconductor region. At least a portion of the semiconductor region is molten during the melt anneal.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 14, 2024
    Inventors: Su-Hao Liu, Wen-Yen Chen, Li-Heng Chen, Li-Ting Wang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Ying-Lang Wang