Patents by Inventor Heng-Ming Hsu

Heng-Ming Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7836510
    Abstract: A mechanism is disclosed for enabling an attribute provider service (APS), which provides access to one or more attributes, to control access to the attributes at the attribute level. In one implementation, a request is received, which specifies a particular attribute that is desired to be accessed from an attribute repository. In response to this request, a policy that applies to the particular attribute is accessed. The policy is then processed to determine whether access to the particular attribute is to be allowed or denied. With the above mechanism, it is possible to control access to attributes at the attribute level rather than at the service level. Because access control is exercised at such a low level, an administrator can exercise much tighter and precise control over how attributes provided by an APS are accessed.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: November 16, 2010
    Assignee: Oracle America, Inc.
    Inventors: Rajeev Angal, Qingwen Cheng, Heng-Ming Hsu, Malla Simhachalam, Dilli Dorai Minnal Arumugam
  • Patent number: 7542009
    Abstract: A wireless communication device using a single spiral inductor antenna and a signal receiving/transmitting method thereof operated on multi-band are provided. The single spiral inductor antenna is designed to have a plurality of different inductance paths. Different inductance values are inducted with signal paths switched by a plurality of switches so as to meet the requirements of multi-band operation. As the circuit structure of the single spiral inductor antenna is used, the circuit area is reduced effectively.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: June 2, 2009
    Assignees: United Microelectronics Corp., National Chung Hsing University
    Inventors: Heng-Ming Hsu, Kuo-Hsun Huang
  • Patent number: 7506162
    Abstract: In accordance with one embodiment of the present invention, there is provided a mechanism for implementing navigation seamlessly between sites in a computing environment in order to access resources without having to require users or user agents to re-authenticate. In one embodiment, there is provided the ability to determine different attribute sets for use with different resources on a target site for a user or user agent authenticated with a first site seeking to access one or more resources of the second site without re-authenticating. In one embodiment, there is provided the ability to map accounts on a first site to accounts on the second site using a set of attributes selected from among attributes provided by an application on the first site. With this mechanism, it is possible for applications or other resources to share information about a user or a user agent across disparate web sites seamlessly.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: March 17, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Heng-Ming Hsu, Qingwen Cheng, Ping Luo, Bhavna Bhatnagar
  • Publication number: 20080218428
    Abstract: A wireless communication device using a single spiral inductor antenna and a signal receiving/transmitting method thereof operated on multi-band are provided. The single spiral inductor antenna is designed to have a plurality of different inductance paths. Different inductance values are inducted with signal paths switched by a plurality of switches so as to meet the requirements of multi-band operation. As the circuit structure of the single spiral inductor antenna is used, the circuit area is reduced effectively.
    Type: Application
    Filed: March 5, 2007
    Publication date: September 11, 2008
    Applicants: United Microelectronics Corp., National Chung Hsing University
    Inventors: Heng-Ming Hsu, Kuo-Hsun Huang
  • Patent number: 7405642
    Abstract: A three dimensional (3D) transformer includes a first coil and a second coil. Each coil includes a first port, a second port, a top layer metal line, inter-layer inner metal lines, inter-layer outer metal lines and a bottom layer metal line. Each metal line of the first coil and that of the second coil are correspondingly arranged to the opposite side of each other. Each of the first port is electrically connected to each of the top metal line. Each coil is arranged clockwise from the top metal line, the inter layer inner metal line down to the bottom layer metal line and arranged clockwise from the bottom layer metal line, the inter layer outer metal line up to the upper metal line of the inter layer outer metal line. Each upper metal line of the inter layer outer metal line is electrically connected to each second port.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: July 29, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Heng-Ming Hsu, Kuo-Hsun Huang
  • Publication number: 20080174398
    Abstract: Within a method for fabricating an inductor structure there is first provided a substrate. There is then formed over the substrate a planar spiral conductor layer to form a planar spiral inductor, wherein a successive series of spirals within the planar spiral conductor layer is formed with a variation in at least one of: (1) a series of linewidths of the successive series of spirals; and (2) a series of spacings of the successive series of spirals. The method contemplates a planar spiral inductor structure fabricated in accord with the method. A planar spiral inductor structure fabricated in accord with the method is characterized by an enhanced Q value of the planar spiral inductor structure.
    Type: Application
    Filed: March 24, 2008
    Publication date: July 24, 2008
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Heng-Ming Hsu, Yen-Shih Ho
  • Patent number: 7031967
    Abstract: A system for providing service attribute information including a directory server containing a hierarchical data store associating users with service attributes through data inheritance, wherein the hierarchical data store includes an organization level and a role level, and attribute templates defined with respect to services and levels, an application for generating a query to the directory server for a service attribute of a particular user of the application, wherein the directory server, in response to the query, is for using inheritance rules from the hierarchical data store to determine and report a service attribute for the particular user of the application.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: April 18, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Qingwen Cheng, Heng-Ming Hsu, Rajesh Kumar Arcot, James F. Nelson, Sai V. Allavarpu
  • Publication number: 20050171958
    Abstract: The present invention is directed to the application of the Class of Service (CoS) feature in a directory server. The CoS feature allows user entries in a directory to be associated to service templates for multiple registered services in the directory. Once a service is registered, a CoS definition (service definition) may be created for that service under the organization entry. Once a service gets activated, an associated CoS template (service template) may be created for that service using its service definition. The template entries contain a list of shared attribute values and changes to these values get automatically applied to all the entries sharing the attribute. By creating these service definitions and templates under an organization entry, all the service privileges can be made available to all entries under the organization. Similarly, policies for resources can be defined for an organization and policy specific attributes can be made applicable to all the entries in the organization.
    Type: Application
    Filed: April 8, 2002
    Publication date: August 4, 2005
    Inventors: Qingwen Cheng, Heng-Ming Hsu, Rajesh Arcot, James Nelson, Sai Allavarpu
  • Patent number: 6903644
    Abstract: An inductor device including a first coil conductor (310) and a second coil conductor (510), the first coil conductor (310) being located over a substrate (120) and having a first pattern and a first conductivity, and the second coil conductor (510) being located on a substantial portion of the first coil conductor (310), having a second pattern substantially conforming to the first pattern, and having a second conductivity substantially greater than the first conductivity.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: June 7, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Hsiung Wang, Shuo-Mao Chen, Heng-Ming Hsu, Jui-Feng Kuan, Chih-Ping Chao, Chih-Hsien Lin
  • Patent number: 6881996
    Abstract: A metal-insulator-metal (MIM) capacitor structure and method of fabrication for CMOS circuits having copper interconnections are described. The method provides metal capacitors with high figure of merit Q (Xc/R) and which does not require additional masks and metal layers. The method forms a copper capacitor bottom metal (CBM) electrode while concurrently forming the pad contacts and level of copper interconnections by the damascene process. An insulating (Si3N4) metal protect layer is formed on the copper and a capacitor interelectrode dielectric layer is formed. A metal protecting buffer is used to protect the thin interelectrode layer, and openings are etched to pad contacts and interconnecting lines. A TiN/AlCu/TiN metal layer is deposited and patterned to form the capacitor top metal (CTM) electrodes, the next level of interconnections, and to provide a pad protect layer on the copper pad contacts.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: April 19, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chun-Hon Chen, Ssu-Pin Ma, Ta-Hsun Yeh, Yen-Shih Ho, Kuo-Reay Peng, Heng-Ming Hsu, Kong-Beng Thei, Chi-Wu Chou
  • Publication number: 20050029566
    Abstract: A metal-insulator-metal (MIM) capacitor structure and method of fabrication for CMOS circuits having copper interconnections are described. The method provides metal capacitors with high figure of merit Q (Xc/R) and which does not require additional masks and metal layers. The method forms a copper capacitor bottom metal (CBM) electrode while concurrently forming the pad contacts and level of copper interconnections by the damascene process. An insulating (Si3N4) metal protect layer is formed on the copper and a capacitor interelectrode dielectric layer is formed. A metal protecting buffer is used to protect the thin interelectrode layer, and openings are etched to pad contacts and interconnecting lines. A TiN/AlCu/TiN metal layer is deposited and patterned to form the capacitor top metal (CTM) electrodes, the next level of interconnections, and to provide a pad protect layer on the copper pad contacts.
    Type: Application
    Filed: September 7, 2004
    Publication date: February 10, 2005
    Inventors: Chun-Hon Chen, Ssu-Pin Ma, Ta-Hsun Yeh, Yen-Shih Ho, Kuo-Reay Peng, Heng-Ming Hsu, Kong-Beng Thei, Chi-Wu Chou
  • Publication number: 20050024176
    Abstract: An inductor device including a first coil conductor (310) and a second coil conductor (510), the first coil conductor (310) being located over a substrate (120) and having a first pattern and a first conductivity, and the second coil conductor (510) being located on a substantial portion of the first coil conductor (310), having a second pattern substantially conforming to the first pattern, and having a second conductivity substantially greater than the first conductivity.
    Type: Application
    Filed: July 28, 2003
    Publication date: February 3, 2005
    Inventors: Sung-Hsiung Wang, Shuo-Mao Chen, Heng-Ming Hsu, Jui-Feng Kuan, Chih-Ping Chao, Chih-Hsien Lin
  • Patent number: 6812088
    Abstract: This MIM structure provides metal capacitors with high figure of merit Q (Xc/R) and does not require additional masks and metal layers. A copper capacitor bottom metal (CBM) electrode is formed, while concurrently forming the pad contacts and level of copper interconnections by the damascene process. An insulating (Si3N4) metal protect layer is formed on the copper and a capacitor interelectrode dielectric layer is formed. A metal protecting buffer protects the thin interelectrode layer, and openings are etched to pad contacts and interconnecting lines. A TiN/AlCu/TiN metal layer is deposited and patterned to form the capacitor top metal (CTM) electrodes, the next level of interconnections, and to provide a pad protect layer on the copper pad contacts. The thick TiN/AlCu/TiN CTM electrode reduces the capacitor series resistance and improves the capacitor figure of merit Q, while the pad protect layer protects the copper from corrosion.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: November 2, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Hon Chen, Ssu-Pin Ma, Ta-Hsun Yeh, Yen-Shih Ho, Kuo-Reay Peng, Heng-Ming Hsu, Kong-Beng Thei, Chi-Wu Chou
  • Publication number: 20030234436
    Abstract: A semiconductor device having an inductor including a planar coil portion forming an opening in the center thereof and a core received in the opening and extending above and below the planar coil portion. A first and a second inter-metal dielectric layer, and the inductor further including a first connecting leg including an electrically conductive material. The first connecting leg is connected to the planar coil portion. The planar coil portion is in the first inter-metal dielectric layer and the first connecting leg is in the second inter-metal dielectric layer. The inductor further includes a second connecting leg connected to the planar coil portion, and an electrically conductive bump connected to the second connecting leg.
    Type: Application
    Filed: June 19, 2002
    Publication date: December 25, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Heng-Ming Hsu, Shyh-Chyi Wong, Jiong-Guang Su
  • Patent number: 6667217
    Abstract: A process for integrating the fabrication of a thick, copper inductor structure, with the fabrication of narrow channel length CMOS devices, has been developed. The integrated process features the use of only one additional photolithographic masking step, used to form the opening in an IMD layer, that will accommodate the subsequent inductor structure. After forming damascene type openings in the same IMD layer, in the CMOS region, copper is deposited and then defined, to result in a thick, copper inductor structure, in the opening in the IMD layer, in a first region of a semiconductor substrate, as well as to result in copper interconnect structures, in the damascene type openings located in a second region of the semiconductor structure, used for the narrow channel length CMOS devices. The use of a thick, copper inductor structure, equal to the thickness of the IMD layer, results in increased inductance, or an increased quality factor, when compared to counterparts formed with thinner metal inductors.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: December 23, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Heng-Ming Hsu, Jau-Yuann Chung, Yen-Shih Ho, Chun-Hon Chen, Kuo-Reay Peng, Ta-Hsun Yeh, Kong-Beng Thei, Ssu-Pin Ma
  • Publication number: 20030231093
    Abstract: Within both a method for fabricating a microelectronic inductor structure, and the microelectronic inductor structure fabricated employing the method, there is formed over a substrate a spirally patterned conductor layer. Within both the method and the microelectronic inductor structure there is also formed over the substrate and annularly surrounding the spirally patterned conductor layer an annular magnetic shielding layer.
    Type: Application
    Filed: June 13, 2002
    Publication date: December 18, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Heng-Ming Hsu, Shyh-Chyi Wong, Jiong-Guang Su
  • Publication number: 20030191763
    Abstract: The present invention is directed to the application of the Class of Service (CoS) feature in a directory server. The CoS feature allows user entries in a directory to be associated to service templates for multiple registered services in the directory. Once a service is registered, a CoS definition (service definition) may be created for that service under the organization entry. Once a service gets activated, an associated CoS template (service template) may be created for that service using its service definition. The template entries contain a list of shared attribute values and changes to these values get automatically applied to all the entries sharing the attribute. By creating these service definitions and templates under an organization entry, all the service privileges can be made available to all entries under the organization. Similarly, policies for resources can be defined for an organization and policy specific attributes can be made applicable to all the entries in the organization.
    Type: Application
    Filed: April 8, 2002
    Publication date: October 9, 2003
    Inventors: Qingwen Cheng, Heng-Ming Hsu, Rajesh Kumar Arcot, James F. Nelson, Sai V. Allavarpu
  • Patent number: 6472721
    Abstract: In many mixed-signal or radio frequency Rf applications, inductors and capacitors are needed at the same time. For a high performance inductor devices, a thick metal layer is needed to increase performance, usually requiring an extra masking process. The present invention describes both a structure and method of fabricating both copper metal-insulator-metal (MIM) capacitors and thick metal inductors, simultaneously, with only one mask, for high frequency mixed-signal or Rf, CMOS applications, in a damascene and dual damascene trench/via process. High performance device structures formed by this invention include: parallel plate capacitor bottom metal (CBM) electrodes and capacitor top metal (CTM) electrodes, metal-insulator-metal (MIM) capacitors, thick inductor metal wiring, interconnects and contact vias.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: October 29, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ssu-Pin Ma, Chun-Hon Chen, Ta-Hsun Yeh, Kuo-Reay Peng, Heng-Ming Hsu, Kong-Beng Thei, Chi-Wu Chou, Yen-Shih Ho
  • Patent number: 6444517
    Abstract: A new method is provided for the creation of an inductive over the surface of a semiconductor substrate. A first layer of metal is created in a layer of dielectric, a second layer of metal is created overlying the first layer of metal. The first layer of metal combined with the second layer of metal form an inductor of increased height, reducing the resistivity of the inductor, increasing the Q value of the inductor. The new method of creating an inductor can be combined with creating contact points that connect to contact points in the active region of the surface of a semiconductor substrate.
    Type: Grant
    Filed: January 23, 2002
    Date of Patent: September 3, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Heng-Ming Hsu, Shyh-Chyi Wong, Chaochieh Tsai, Ssu-Pin Ma, Chao-Cheng Chen, Liang-Kun Huang
  • Publication number: 20020019123
    Abstract: In many mixed-signal or radio frequency Rf applications, inductors and capacitors are needed at the same time. For a high performance inductor devices, a thick metal layer is needed to increase performance, usually requiring an extra masking process. The present invention describes both a structure and method of fabricating both copper metal-insulator-metal (MIM) capacitors and thick metal inductors, simultaneously, with only one mask, for high frequency mixed-signal or Rf, CMOS applications, in a damascene and dual damascene trench/via process. High performance device structures formed by this invention include: parallel plate capacitor bottom metal (CBM) electrodes and capacitor top metal (CTM) electrodes, metal-insulator-metal (MIM) capacitors, thick inductor metal wiring, interconnects and contact vias.
    Type: Application
    Filed: September 27, 2001
    Publication date: February 14, 2002
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
    Inventors: Ssu-Pin Ma, Chun-Hon Chen, Ta-Hsun Yeh, Kuo-Reay Peng, Heng-Ming Hsu, Kong-Beng Thei, Chi-Wu Chou, Yen-Shih Ho