Patents by Inventor Heng QUE

Heng QUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11513852
    Abstract: A data transferring apparatus and a method for transferring data with overlap are provided. The data transferring apparatus includes a command splitter circuit and a plurality of tile processing circuits. The command splitter circuit splits a block level transfer command into a plurality of tile transfer tasks. The command splitter circuit may issue the tile transfer tasks to the tile processing circuits in a plurality of batches. The tile processing circuits may execute the tile transfer tasks in a current batch, so as to read data of a plurality of corresponding tiles among a plurality of source tiles of a source block to the tile processing circuits. After all the tile transfer tasks in the current batch have been executed by the tile processing circuits, the command splitter circuit issues the tile transfer tasks in a next batch of the batches to the tile processing circuits.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: November 29, 2022
    Assignee: GlenFly Technology Co., Ltd.
    Inventors: Heng Que, Yuanfeng Wang, Deming Gu, Fengxia Wu
  • Patent number: 11425403
    Abstract: The invention introduces a method for compressing texture tiles, which contains at least the following steps: lossless-compressing raw data of a texture tile; determining whether a length of the lossless-compression result of the raw data is greater than a target result; and when the length of the lossless-compression result of the raw data is greater than the target length, performing data-reduction control in layers for generating reduced data by reducing the raw data, and generating a lossless-compression result of the reduced data, thereby enabling the length of the lossless-compression result of the reduced data to be equal to the target length or shorter.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: August 23, 2022
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Yemao Shen, Deming Gu, Heng Que, Wei Zhang
  • Publication number: 20210271515
    Abstract: A data transferring apparatus and a method for transferring data with overlap are provided. The data transferring apparatus includes a command splitter circuit and a plurality of tile processing circuits. The command splitter circuit splits a block level transfer command into a plurality of tile transfer tasks. The command splitter circuit may issue the tile transfer tasks to the tile processing circuits in a plurality of batches. The tile processing circuits may execute the tile transfer tasks in a current batch, so as to read data of a plurality of corresponding tiles among a plurality of source tiles of a source block to the tile processing circuits. After all the tile transfer tasks in the current batch have been executed by the tile processing circuits, the command splitter circuit issues the tile transfer tasks in a next batch of the batches to the tile processing circuits.
    Type: Application
    Filed: May 15, 2020
    Publication date: September 2, 2021
    Applicant: GlenFly Technology Co., Ltd.
    Inventors: Heng QUE, Yuanfeng WANG, Deming GU, Fengxia WU
  • Publication number: 20210152838
    Abstract: The invention introduces a method for compressing texture tiles, which contains at least the following steps: lossless-compressing raw data of a texture tile; determining whether a length of the lossless-compression result of the raw data is greater than a target result; and when the length of the lossless-compression result of the raw data is greater than the target length, performing data-reduction control in layers for generating reduced data by reducing the raw data, and generating a lossless-compression result of the reduced data, thereby enabling the length of the lossless-compression result of the reduced data to be equal to the target length or shorter.
    Type: Application
    Filed: January 28, 2021
    Publication date: May 20, 2021
    Inventors: Yemao SHEN, Deming GU, Heng QUE, Wei ZHANG
  • Patent number: 10979723
    Abstract: The disclosure provides an image processing method and an image processing device. The method includes: obtaining a specific block from a specific block group of a specific image, wherein the specific block group includes blocks; compressing the specific block as a specific stream based on a predetermined compression ratio; when a length of the specific stream is not shorter than a predetermined block length, dividing the specific stream into a first sub-stream and a second sub-stream; storing the first sub-stream into a specific private block of a plurality of private blocks; finding an idle chunk out of shared chunks shared by the blocks; if the idle chunk is enough for storing the second sub-stream, storing the second sub-stream into the idle chunk and using a chunk usage information to record a number of the idle chunk.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: April 13, 2021
    Assignee: GlenFlyTechnology Co., Ltd.
    Inventors: Kuan Li, Heng Que, Yuanfeng Wang, Jinmin Zhang
  • Publication number: 20200366907
    Abstract: The disclosure provides an image processing method and an image processing device. The method includes: obtaining a specific block from a specific block group of a specific image, wherein the specific block group includes blocks; compressing the specific block as a specific stream based on a predetermined compression ratio; when a length of the specific stream is not shorter than a predetermined block length, dividing the specific stream into a first sub-stream and a second sub-stream; storing the first sub-stream into a specific private block of a plurality of private blocks; finding an idle chunk out of shared chunks shared by the blocks; if the idle chunk is enough for storing the second sub-stream, storing the second sub-stream into the idle chunk and using a chunk usage information to record a number of the idle chunk.
    Type: Application
    Filed: June 5, 2019
    Publication date: November 19, 2020
    Applicant: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Kuan LI, Heng QUE, Yuanfeng WANG, Jinmin ZHANG
  • Patent number: 10679318
    Abstract: A graphics processing method is provided, adapted to a graphic processing unit, the steps including: receiving, via a CSP, a first command associated with all render targets from a display driver; determining, via the display driver, sizes and areas of a plurality of tiles in each frame; repeatedly controlling, via a scissor pool unit, a graphics processing unit to perform drawing processing for each tile according to the first command; comparing, via a signature comparing unit of a cache memory, a signature of a current tile of a current frame and a signature of a tile corresponding to the same position of a previous frame and generating a comparison result; and determining whether to flush the dirty data of the current tile stored in the cache memory from the cache memory to a memory access unit according to the comparison result.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: June 9, 2020
    Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
    Inventors: Fengxia Wu, Deming Gu, Heng Que, Yi Zhou, Ying Wang
  • Publication number: 20200118239
    Abstract: A graphics processing method is provided, adapted to a graphic processing unit, the steps including: receiving, via a CSP, a first command associated with all render targets from a display driver; determining, via the display driver, sizes and areas of a plurality of tiles in each frame; repeatedly controlling, via a scissor pool unit, a graphics processing unit to perform drawing processing for each tile according to the first command; comparing, via a signature comparing unit of a cache memory, a signature of a current tile of a current frame and a signature of a tile corresponding to the same position of a previous frame and generating a comparison result; and determining whether to flush the dirty data of the current tile stored in the cache memory from the cache memory to a memory access unit according to the comparison result.
    Type: Application
    Filed: April 11, 2019
    Publication date: April 16, 2020
    Inventors: Fengxia WU, Deming GU, Heng QUE, Yi ZHOU, Ying WANG
  • Patent number: 10250896
    Abstract: An image compression method based on JPEG-LS is presented. In the method, the M×N pixels in the source image are divided into k groups. M, N, and k are all integers larger than one. Each group corresponds to a plurality of pixels among the M×N pixels. The decorrelation procedure and the context modeling procedure are performed for each of the plurality of pixels in the ith group of the k groups. The compensation look-up table is not refreshed until all pixels in the ith group are performed with the decorrelation procedure and the context modeling procedure.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: April 2, 2019
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Heng Que, Deming Gu, Zhou Hong, Yuanfeng Wang
  • Patent number: 10210034
    Abstract: An electronic device, for integration with functional circuit modules, includes gates, monitor module, signal control module and record module. The functional modules are operated on clock signal for generating request instruction and response signal. The gate is coupled to the functional modules for transmitting request instruction and response signal to functional module on enable signals. The monitor module is coupled to the functional modules and the gates for generating hold signal. The monitor module generates enable signals on finish signal. The clock signal control module coupled to the functional modules and the monitor module for outputs main clock signal to generate clock signals. The clock signal control module generates record instruction and stop clock signals, and the clock signal control module re-outputs clock signals on finish signal.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: February 19, 2019
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Heng Que, Quanquan Xu, Deming Gu, Yuanfeng Wang
  • Patent number: 10134172
    Abstract: A first request is received from a window checker, requesting to read cell data from a window buffer or write cell data into the window buffer, where the first request contains at least first cell index. A second request is received from a window releaser, requesting to read cell data from the window buffer or write cell data into the window buffer, where the second request contains at least second cell index. A register stores the first cell index, the second cell index, a first lock flag indicating whether the window checker has read cell data but hasn't written cell data back and a second lock flag indicating whether the window releaser has read cell data but hasn't written cell data back. One of the requests is granted according to the first and second cell indices and the first and second lock flags.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: November 20, 2018
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Heng Xiao, Ying Liang, Heng Que
  • Patent number: 10115176
    Abstract: A memory-access completion notification associated with a data unit is received from a thread of a pixel shader. A processing status associated with the data unit is obtained from a window buffer. The processing status is updated to indicate that the data unit has not been processed by any thread. The updated processing status is written into the window buffer.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: October 30, 2018
    Assignee: VIA Alliance Semiconductor Co., Ltd.
    Inventors: Heng Xiao, Ying Liang, Heng Que
  • Patent number: 10074040
    Abstract: The invention introduces a method for compressing texture tiles, which contains at least the following steps: classifying each pixel of a texture tile into one of a plurality of groups and generating a bitmap of the texture tile, wherein the bitmap contains information indicating to which group each pixel of the texture tile belongs; reducing dependencies between pixels of each group; lossless-encoding each pixel of the texture tile to generate a first compression result; and outputting the first compression result and the bitmap.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: September 11, 2018
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Yemao Shen, Deming Gu, Heng Que, Wei Zhang
  • Patent number: 10037590
    Abstract: A graphics processing unit and associated graphics processing method are provided. The graphics processing unit includes: an execution unit, for performing shader execution and texture loading; a fixed-function unit, for executing a graphics rendering pipeline; a memory-access unit; a texture unit, for reading texture data from a memory via the memory-access unit according to the data requirement of the execution unit or the fixed-function unit; and a command stream parser, for receiving a draw command from a display driver, and transmitting the draw command to the execution unit or the fixed-function unit to perform graphics processing according to the type of draw command. When the command stream parser determines that the draw command is a specific draw command, the command stream parser transmits the draw command only to the fixed-function unit to perform graphics processing, and turns off power to the execution unit.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: July 31, 2018
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Fengxia Wu, Yuanfeng Wang, Zhou Hong, Heng Que
  • Publication number: 20180146204
    Abstract: The invention introduces a method for compressing texture tiles, which contains at least the following steps: lossless-compressing raw data of a texture tile; determining whether a length of the lossless-compression result of the raw data is greater than a target result; and when the length of the lossless-compression result of the raw data is greater than the target length, performing data-reduction control in layers for generating reduced data by reducing the raw data, and generating a lossless-compression result of the reduced data, thereby enabling the length of the lossless-compression result of the reduced data to be equal to the target length or shorter.
    Type: Application
    Filed: November 30, 2016
    Publication date: May 24, 2018
    Inventors: Yemao SHEN, Deming GU, Heng QUE, Wei ZHANG
  • Publication number: 20180144215
    Abstract: The invention introduces a method for compressing texture tiles, which contains at least the following steps: classifying each pixel of a texture tile into one of a plurality of groups and generating a bitmap of the texture tile, wherein the bitmap contains information indicating to which group each pixel of the texture tile belongs; reducing dependencies between pixels of each group; lossless-encoding each pixel of the texture tile to generate a first compression result; and outputting the first compression result and the bitmap.
    Type: Application
    Filed: November 30, 2016
    Publication date: May 24, 2018
    Inventors: Yemao SHEN, Deming GU, Heng QUE, Wei ZHANG
  • Patent number: 9892484
    Abstract: A memory access request associated with a data unit is received from a first thread of a pixel shader. A processing status associated with the data unit is obtained from a window buffer. It is determined whether the data unit is being processed by a second thread. If so, a rejection procedure is performed to avoid the first thread gaining to access an attribute value associated with the data unit from/to a DRAM (Dynamic Random Access Memory). Otherwise, an acknowledgement procedure is performed to grant the first thread to access the attribute value associated with the data unit from/to the DRAM.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: February 13, 2018
    Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
    Inventors: Heng Xiao, Ying Liang, Heng Que
  • Publication number: 20170295378
    Abstract: An image compression method based on JPEG-LS is presented. In the method, the M×N pixels in the source image are divided into k groups. M, N, and k are all integers larger than one. Each group corresponds to a plurality of pixels among the M×N pixels. The decorrelation procedure and the context modeling procedure are performed for each of the plurality of pixels in the ith group of the k groups. The compensation look-up table is not refreshed until all pixels in the ith group are performed with the decorrelation procedure and the context modeling procedure.
    Type: Application
    Filed: October 7, 2016
    Publication date: October 12, 2017
    Inventors: HENG QUE, DEMING GU, ZHOU HONG, YUANFENG WANG
  • Publication number: 20170147426
    Abstract: An electronic device includes functional modules, gates, monitor module, signal control module and record module. The functional modules are operated on clock signal for generating request instruction and response signal. The gate is coupled to the functional modules for transmitting request instruction and response signal to functional module on enable signals. The monitor module is coupled to the functional modules and the gates for generating hold signal. The monitor module generates enable signals on finish signal. The clock signal control module coupled to the functional modules and the monitor module for outputs main clock signal to generate clock signals. The clock signal control module generates record instruction and stop clock signals, and the clock signal control module re-outputs clock signals on finish signal. The record module coupled to the functional modules and the clock signal control module begins to record request instruction and response signal when receiving record instruction.
    Type: Application
    Filed: September 20, 2016
    Publication date: May 25, 2017
    Inventors: HENG QUE, QUANQUAN XU, DEMING GU, YUANFENG WANG
  • Publication number: 20170140568
    Abstract: A first request is received from a window checker, requesting to read cell data from a window buffer or write cell data into the window buffer, where the first request contains at least first cell index. A second request is received from a window releaser, requesting to read cell data from the window buffer or write cell data into the window buffer, where the second request contains at least second cell index. A register stores the first cell index, the second cell index, a first lock flag indicating whether the window checker has read cell data but hasn't written cell data back and a second lock flag indicating whether the window releaser has read cell data but hasn't written cell data back. One of the requests is granted according to the first and second cell indices and the first and second lock flags.
    Type: Application
    Filed: April 28, 2016
    Publication date: May 18, 2017
    Inventors: Heng XIAO, Ying LIANG, Heng QUE