Abstract: A power amplifier includes an amplifying circuit, a feedback circuit and a grounding capacitor. The amplifier circuit includes at least a first transistor and a second transistor. A control terminal of the first transistor is configured to receive an input signal, a first terminal of the second transistor is coupled to the first transistor, and a second terminal of the second transistor is configured to generate an output signal. The feedback circuit is coupled to the control terminal of the first transistor and the second terminal of the second transistor. The ground capacitor is configured to couple the control terminal of the second transistor to ground. When a frequency of the input signal is between a first band and a second band, an amplification gain of the output signal relative to the input signal is substantially the same.

Abstract: A wideband bow tie antenna includes a guiding unit, a radiating unit, and a reflecting unit. The radiating unit is configured between the guiding unit and the reflecting unit. The radiating unit includes a guiding substrate and a guiding patch configured on the guiding substrate. The radiating unit includes a radiating substrate and a first bow tie radiator which is configured on the radiating substrate and coupled with the guiding patch. The first bow tie radiator includes two single radiating portions which are symmetrically configured to each other. The reflecting unit includes a reflecting substrate and a loop reflecting patch which are configured on the reflecting substrate and coupled with the first bow tie radiator.

Abstract: The present invention discloses a gate structure, which is applied for an electronic component comprising a substrate and an active region defined thereon, and such the gate structure is disposed in the active region and is a T-shaped gate having a stem with a height of 250 nm. Preferably, the gate structure has a gate length of 60 nm.

Abstract: In a device and a method for communication back end processing based on user end dynamic feedback to configure communication linking, the communication back end processing device includes a communication module and an optimization configuration module. The communication module communicates with a plurality of external base stations, one of base stations communicates with an external user end. The optimization configuration module is electrically connected to the communication module and triggers the user end to transmit user information to the optimization configuration module. The optimization configuration module triggers the base station to transmit the base station information to the optimization configuration module. The optimization configuration module according to user information and at least one piece of base station information assigns a base station to connect the user end, so as to optimize the communication linking status between assigned base station and user end.

Abstract: A wideband bow tie antenna includes a guiding unit, a radiating unit, and a reflecting unit. The radiating unit is configured between the guiding unit and the reflecting unit. The radiating unit includes a guiding substrate and a guiding patch configured on the guiding substrate. The radiating unit includes a radiating substrate and a first bow tie radiator which is configured on the radiating substrate and coupled with the guiding patch. The first bow tie radiator includes two single radiating portions which are symmetrically configured to each other. The reflecting unit includes a reflecting substrate and a loop reflecting patch which are configured on the reflecting substrate and coupled with the first bow tie radiator.

Abstract: The present invention discloses a gate structure, which is applied for an electronic component comprising a substrate and an active region defined thereon, and such the gate structure is disposed in the active region and is a T-shaped gate having a stem with a height of 250 nm. Preferably, the gate structure has a gate length of 60 nm.

Abstract: A manufacturing method of a device having series-connected HEMTs is presented. Transistors are formed on a substrate and integratedly serial-connected as an integrated device by interconnection wires. Therefore, the voltage of the device is the sum of the voltages across each transistors so that the device can have high breakdown voltage.

Abstract: A high electron mobility transistor includes a substrate, a buffer layer, a channel layer, a spacer layer, a schottky layer and a cap layer. The buffer layer is formed on the substrate. The channel layer is formed on the buffer layer, in which the channel layer comprises a superlattice structure formed with a plurality of indium gallium arsenide thin films alternately stacked with a plurality of indium arsenide thin films. The spacer layer is formed on the channel layer. The schottky layer is formed on the spacer layer. The cap layer is formed on the schottky layer.

Abstract: A manufacturing method of a device having series-connected HEMTs is presented. Transistors are formed on a substrate and integratedly serial-connected as an integrated device by interconnection wires. Therefore, the voltage of the device is the sum of the voltages across each transistors so that the device can have high breakdown voltage.

Abstract: A high electron mobility transistor includes a substrate, a buffer layer, a channel layer, a spacer layer, a schottky layer and a cap layer. The buffer layer is formed on the substrate. The channel layer is formed on the buffer layer, in which the channel layer comprises a superlattice structure formed with a plurality of indium gallium arsenide thin films alternately stacked with a plurality of indium arsenide thin films. The spacer layer is formed on the channel layer. The schottky layer is formed on the spacer layer. The cap layer is formed on the schottky layer.