Patents by Inventor Heng Yang
Heng Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11961886Abstract: Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a substrate and nanostructures suspended over the substrate. The semiconductor structure also includes a gate structure wrapping around the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure also includes a contact vertically over the source/drain structure and a first conductive structure vertically over the gate structure. The semiconductor structure also includes a second conductive structure in contact with a top surface of the first conductive structure and a top surface of the contact and including an extending portion laterally sandwiched between the first conductive structure and the contact.Type: GrantFiled: November 1, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jia-Heng Wang, Pang-Chi Wu, Chao-Hsun Wang, Fu-Kai Yang, Mei-Yun Wang
-
Publication number: 20240118430Abstract: A GNSS emergency monitoring error suppression method for an alpine canyon complex environment is provided. Through three steps of GNSS optimization design of the alpine canyon complex environment, derived error suppression of emergency monitoring criteria in the alpine canyon complex environment, and error suppression measurement and result correction, GNSS measurement errors in the alpine canyons can be effectively suppressed. Through improving measurement accuracy, GNSS technology can be widely applied to the alpine canyons, outstanding advantages of high efficiency and high accuracy in a coordinate transmission process of the GNSS technology are brought into full play, and a cost is effectively reduced. Meanwhile, by processing the errors of the emergency monitoring criteria, it is possible to protect workers from on-site operation risks.Type: ApplicationFiled: September 8, 2023Publication date: April 11, 2024Inventors: Zufeng Li, Heng Zhou, Shuwen Yang, Haixing Shang, Gangyi Zhao, Zhixuan Miao, Qun Zhang, Guangjun Yi, Wei Ren, ShengXue Ke, Ruixue Li
-
Patent number: 11955524Abstract: The present application discloses a semi-floating gate device. A floating gate structure covers a selected area of a first well region and is used to form a conductive channel. The floating gate structure further covers a surface of a lightly doped drain region, and a floating gate material layer and the lightly doped drain region contact at a dielectric layer window to form a PN structure. A source region is self-aligned with a first side surface of the floating gate structure. A first control gate is superposed on a top of the floating gate structure. A second control gate is disposed on a surface of the lightly doped drain region between the drain region and a second side surface of the floating gate structure. The first control gate and the second control gate are isolated by an inter-gate dielectric layer.Type: GrantFiled: May 31, 2022Date of Patent: April 9, 2024Assignee: Shanghai Huali Integrated Circuit CorporationInventors: Heng Liu, Jianghua Leng, Zhigang Yang, Tianpeng Guan
-
Publication number: 20240110200Abstract: A recombinant AAV vector including a sequence for introducing the expression of G protein-coupled receptor 173 (GPR173) and specifically targeting GPR173 expressing neurons in a brain is provided. A method of restoring the excitatory/inhibitory (E/I) balance in brain or for prophylaxis and/or therapy of a neurological condition in a subject in need thereof by administrating the recombinant AAV vector or a GPR173 agonist to the subject is also provided.Type: ApplicationFiled: September 27, 2022Publication date: April 4, 2024Inventors: Jufang He, Ling He, Heng Shi, Yujie Yang, Ge Zhang, Xi Chen, Ezra Yoon, Siuhin Lau
-
Patent number: 11915940Abstract: A method of cyclic etching, comprising: (A) depositing, prior to cyclically etching a substrate through a mask opening, a pre-etch protection layer conformally over the mask, sidewalls of the mask defining the mask opening; and an exposed portion of the substrate exposed through the mask opening, the pre-etch protection layer deposited to a first thickness; and (B) cyclically etching the substrate by: (i) depositing a protection layer in the opening of the mask, the protection layer deposited to a second thickness that is less than half of the first thickness; (ii) etching through a portion of the protection layer disposed on the substrate and etching the substrate; and (iii) repeating (i) and (ii) until an end point is reached.Type: GrantFiled: July 2, 2021Date of Patent: February 27, 2024Assignee: Applied Materials, Inc.Inventors: Zhi Gang Wang, Jiao Yang, Alfredo Granados, Jon C. Farr, Heng Wang, Rui Zhe Ren
-
Patent number: 11895863Abstract: A display panel, a manufacturing method and a display device are provided. The display panel includes a substrate having a display area and a non-display area; a planarization layer covering the display area and the non-display area of the substrate; an organic light emitting element located in the display area and located at a side of the planarization layer away from the substrate; an encapsulation structure including a first inorganic layer, an organic layer and a second inorganic layer which are sequentially stacked, where the first inorganic layer and the second inorganic layer extend into a non-display area, and the first inorganic layer is arranged close to the planarization layer; and/or, a part of the planarization layer located in the non-display area is provided with a groove, and the groove is filled with a flexible water-oxidation resistant material.Type: GrantFiled: September 27, 2021Date of Patent: February 6, 2024Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Heng Yang, Wei Li, Yanbo Zeng, Yinglong Huang
-
Publication number: 20230393800Abstract: Disclosed are an online meeting interface method and apparatus, a medium, and a computer program product, which relate to the technical field of online meetings. The method includes obtaining a frame background image of the online meeting in a same-frame mode; generating a same-frame picture based on the frame background image and video pictures of participants, the video pictures of different participants being displayed at different positions of the frame background image; and pushing the same-frame picture to clients of the participants. The clients may display the same-frame picture in the online meeting interface.Type: ApplicationFiled: August 17, 2023Publication date: December 7, 2023Inventors: Leixin YANG, Heng YANG, Xiufeng ZHU, Wanpeng LUO, Jianfeng YE, Zihao WANG, Weiyi ZENG
-
Publication number: 20230323036Abstract: A method of preparing alkyl functionalized polysiloxane, comprising: I) reacting silane oligomer with hydroxyl-terminated polysiloxane in the presence of Catalyst 1, and II) reacting the product of Step (I) with an endcapper in the presence of Catalyst 2. This method could flexibly adjust the polymerization degree and viscosity of the desired long-chain alkyl functionalized polysiloxane for different application fields and introduce multiple alkyl functional groups and further functional groups to obtain bifunctionalized polysiloxane, moreover this method could greatly reduce the proportion of undesired cyclosiloxanes in the equilibrium product and the reaction is mild, easy to operate and environmentally friendly.Type: ApplicationFiled: September 7, 2020Publication date: October 12, 2023Applicant: Wacker Chemie AGInventors: Heng YANG, Shuai TIAN, Xiong ZANG
-
Publication number: 20230323035Abstract: The present disclosure relates to a hydrogenpolyorganosiloxane of formula X—[SiR12O]m—[SiR1(CaH2a+1)O]n—[SiR1HO]r—[SiR12]—X where a is an arbitrary integer between 6 and 18, n is an arbitrary number between 0.7 and 30, m is an arbitrary number between 10 and 1500, r is an arbitrary number between 0 and 200, R1 is independently at each occurrence a C1-C5 alkyl or phenyl, and X represents one or more groups selected from among hydrogen, alkoxy and hydroxyl, and greater than or equal to 60 mol % of X are hydrogen atoms. The hydrogenpolyorganosiloxane can significantly lower the viscosity and improve the flowability of the resulting silicone composition compared with the existing hydrogenpolyorganosiloxanes at the same thermally conductive filler loading, thereby improving the thermal conductivity.Type: ApplicationFiled: September 7, 2020Publication date: October 12, 2023Applicant: Wacker Chemie AGInventors: Shuai TIAN, Arvid KUHN, Heng YANG
-
Publication number: 20230311074Abstract: An apparatus, system and redox membrane for efficient lithium-ion extraction from natural salt waters or geothermal brines or manmade sources such as from lithium battery recycling are provided. The redox membrane is selective for lithium ions over other spectator ions making the system capable of selectively extracting lithium-ions from multiple-ion source solutions. The system uses the redox membrane as an electrochemically active material acting as a Li-selective membrane for direct lithium extraction from a lithium-ion source. The redox membrane is also not porous to solvents and is stable in caustic and high temperature environments. The features of the redox membrane and system allow the recovery of lithium from low purity sources and the production of higher purity products at reduced costs and process steps over conventional processes.Type: ApplicationFiled: March 31, 2023Publication date: October 5, 2023Applicant: XERION ADVANCED BATTERY CORP.Inventors: Heng Yang, Badri Shyam, John Busbee, John Cook, Rodrigo Rodriguez
-
Publication number: 20230317526Abstract: The present invention proposes a semiconductor device. The semiconductor device includes a first and a second transistor sets, a fin pattern, a rare earth oxide layer and an insulation layer. The first and a second transistor sets commonly have at the bases thereof a buried oxide layer (BOX), wherein the first transistor set has a rare earth oxide. The fin pattern on the BOX within a first region for the first transistor set and a second region for the second transistor set. The rare earth oxide layer includes the rare earth oxide and is formed on the BOX and the fin pattern in the first region. The insulation layer is formed on the rare earth oxide layer in the first region, the BOX and the fin pattern in the second region.Type: ApplicationFiled: April 4, 2022Publication date: October 5, 2023Inventors: LIANG LI, Chun Yu Wong, John Zhang, HUANG LIU, Sunil Singh, Heng Yang
-
Publication number: 20230295380Abstract: The method relates to the technical field of organic silicone copolymers, it is suitable for the field of fiber substrate treatment and is more suitable for the field of textile treatment.Type: ApplicationFiled: September 8, 2020Publication date: September 21, 2023Applicant: Wacker Chemie AGInventors: Heng YANG, Shuai TIAN
-
Publication number: 20230290855Abstract: The invention discloses a transistor structure including a substrate, a semiconductor layer disposed on the substrate and a gate layer disposed on the semiconductor layer, wherein the gate layer includes at least one gate having a first height, a first side and a second side opposite to the first side, a first dielectric spacer is disposed at the first side of the at least one gate, a first air spacer having a second height is disposed inside the first dielectric spacer, and the second height is lower than the first height.Type: ApplicationFiled: March 11, 2022Publication date: September 14, 2023Inventors: John H Zhang, Chun Yu Wong, Sunil K Singh, Liang Li, Heng Yang
-
Patent number: 11746193Abstract: Block-modified polysiloxanes and compositions comprising the block-modified polysiloxanes are useful in the field of textile finishing. Emulsions comprising the compositions have a very small and narrowly distributed particle size which increases penetration, and provide good softening properties coupled with good hydrophilicity.Type: GrantFiled: November 20, 2018Date of Patent: September 5, 2023Assignee: WACKER CHEMIE AGInventors: Heng Yang, Shuai Tian, Zhongliang Sun
-
Publication number: 20230275813Abstract: A computation offloading method includes: establishing an associated model of a terminal for computation offloading; training the associated model by taking a to-be-computed task of the terminal, an uplink communication channel gain, a sensing pulse response and an angle difference between a communication beam and a sensing beam as input, to obtain an offloading parameter of the terminal for the to-be-computed task, wherein the to-be-computed task comprises to-be-computed communication data and to-be-computed sensing data, and the offloading parameter comprises a decision for offloading a computing task and a decision for offloading radio frequency transmission power; and offloading the to-be-computed task to an edge side according to the offloading parameter.Type: ApplicationFiled: February 27, 2023Publication date: August 31, 2023Inventors: Zhiyong FENG, Heng YANG, Zhiqing WEI, Ping ZHANG, Xu CHEN, Yiheng LI
-
Publication number: 20230252266Abstract: A method for predicting and controlling a water level of a series water conveyance canal on the basis of a fuzzy neural network is disclosed. The method includes: performing the relationship between a sluice opening degree and an open canal control water level by means of a fuzzy neural network, and constructing an upstream water level controller of a coupled predictive control algorithm; solving an optimal control rate of the upstream water level controller using a gradient optimization algorithm on the basis of a control target of the upstream water level controller; and generating a control strategy by collecting actually measured water level change information and multiplying the actually measured water level change information by the optimal control rate on the basis of the solved optimal control rate, thereby fulfilling the object of predicting and controlling the water level.Type: ApplicationFiled: March 9, 2021Publication date: August 10, 2023Applicants: CHINA THREE GORGES CORPORATION, CHINA INSTITUTE OF WATER RESOURCES AND HYDROPOWER RESEARCHInventors: Hao WANG, Xiaohui LEI, Huichao DAI, Lingzhong KONG, Zhao ZHANG, Chao WANG, Heng YANG, Yongnan ZHU, Zhaohui YANG
-
Publication number: 20230240065Abstract: A method of forming a plug for a semiconductor device and a semiconductor device thereof are disclosed. The proposed method of forming a plug for a semiconductor device, wherein the semiconductor device includes a deep trench (DT) structure and a storage node configured in the DT structure, comprising: (a) filling a single film in the DT structure and to cover the storage node; and (b) etching back the single film to form the plug located in the DT structure and around the storage node, wherein the single film forms a liner of a single type.Type: ApplicationFiled: January 27, 2022Publication date: July 27, 2023Applicant: HeFeChip Corporation LimitedInventors: Liang Li, John Zhang, Heng Yang, Huang Liu
-
Patent number: 11703457Abstract: The disclosure provides a structure diagnosis system and a structure diagnosis method. The structure diagnosis system includes: a lidar scanner scanning a structure to generate a point cloud data; an input interface receiving the point cloud data; and a processor receiving the point cloud data and generating a point cloud data set. The processor executes a surface degradation and geometry abnormal coupling diagnosis module to: marking a first point cloud range of a surface degradation area according to color space value of the point cloud data set; marking a second point cloud range of a geometry abnormal area according to coordinate value of the point cloud data set; when an abnormal area includes the first point cloud range and the second point cloud range at least partially overlapping each other, determining surface degradation or geometry abnormal occurring at the abnormal area and mark the abnormal area with a predetermined mode.Type: GrantFiled: December 29, 2020Date of Patent: July 18, 2023Assignee: Industrial Technology Research InstituteInventors: Yi-Heng Yang, Cheng-Yang Tsai, Li-Hua Wang, Tsann-Tay Tang, Te-Ming Chen
-
Patent number: 11672507Abstract: Systems and methods for ultrasound shear wave elastography (SWE) are described. According to examples, an ultrasound SWE system includes an ultrasound probe (120), an actuation assembly (130) coupled to the probe and configured to apply an external force against a subject for generating a shear wave within a target region, a controller (140) coupled to the actuation assembly to control the actuation assembly to apply the force responsive to a trigger signal, and ultrasound scanner (110) configured to generate the trigger signal, and further configured to generate an elastography image based at least in part on echo signals received from the target region.Type: GrantFiled: March 30, 2018Date of Patent: June 13, 2023Assignees: KONINKLIJKE PHILIPS N.V., MASSACHUSETTS INSTITUTE OF TECHNOLOGYInventors: Man Nguyen, Hua Xie, Sheng-Wen Huang, Brian Anthony, Heng Yang
-
Publication number: 20230147981Abstract: A planar transistor device is disclosed including a gate structure positioned above a semiconductor substrate, the semiconductor substrate comprising a substantially planar upper surface, a channel region, a source region, a drain region, and at least one layer of a two-dimensional (2D) material that is positioned in at least one of the source region, the drain region or the channel region, wherein the layer of 2D material has a substantially planar upper surface, a substantially planar bottom surface and a substantially uniform vertical thickness across an entire length of the layer of 2D material in the gate length direction and across an entire width of the layer of 2D material in the gate width direction, wherein the substantially planar upper surface and the substantially planar bottom surface of the layer of 2D material are positioned approximately parallel to a substantially planar surface of the semiconductor substrate.Type: ApplicationFiled: January 3, 2023Publication date: May 11, 2023Inventors: David Pritchard, Heng Yang, Hongru Ren, Neha Nayyar, Manjunatha Prabhu, Elizabeth Strehlow, Salvatore Cimino