Abstract: A pacemaker has logic incorporated for holding the pacemaker circuitry, or at least a portion of such circuitry, in a low current drain "standby" mode of operation from time of fabrication until time of implantation or preparation for implantation, in order to minimize battery depletion during shelf life. In one embodiment, the pacemaker detects when a lead has been connected to the pulse generator output so as to present an impedance below a predetermined threshold, and such detection is used to take the pacemaker out of the "standby" mode and place it in a fully operational mode. The pacemaker is further provided for sensing an externally generated signal in response to which the pacemaker is placed in an operational mode for a predetermined time duration, following which it reverts to the standby mode.