Abstract: A method for manufacturing a wafer level package of an integrated circuit element for direct attachment to a wiring board is disclosed. An integrated circuit element includes input/output pads located on an active side. A non-conductive support structure is formed on the active side of the integrated circuit element in an area that is free from input/output pads. A conductive path is formed upon the support structure and a non-conductive coating is formed on over the active side of the integrated circuit element such that a surface is formed which leaves interface pads accessible.

Abstract: A method for manufacturing a wafer level package of an integrated circuit element for direct attachment to a wiring board is disclosed. An integrated circuit element includes input/output pads located on an active side. A non-conductive support structure is formed on the active side of the integrated circuit element in an area that is free from input/output pads. A conductive path is formed upon the support structure and a non-conductive coating is formed on over the active side of the integrated circuit element such that a surface is formed which leaves interface pads accessible.

Abstract: A transfer mold process for encapsulation of a matrix array package of dice on a substrate is proposed wherein the flow of the mold compound between dice is at least partly obstructed. In other words, the flow velocity of the mold compound between dice is constrained with the goal of approximating it to the flow velocity above the dice. It is to be understood that every limitation of the flow velocity between the dice, even if it does not result in equal or uniform velocity throughout the cross-sectional area, will bring about a positive effect in terms of reducing the clustering of filler particles in certain areas of the mold compound. The semiconductor device thus produced is part of the present disclosure.

Abstract: The inventive method is based on the a idea of releasing a mechanical connection between the semiconductor chip and the supporting substrate during the manufacturing of the packing. The mechanical connection required for producing the electrical contacts between the semiconductor chip and the supporting substrate ensues only temporarily. As a result, a critical interface in the packing is removed thereby resulting in distinctly reducing the thermomechanical stresses.

Abstract: The inventive method is based on the a idea of releasing a mechanical connection between the semiconductor chip and the supporting substrate during the manufacturing of the packing. The mechanical connection required for producing the electrical contacts between the semiconductor chip and the supporting substrate ensues only temporarily. As a result, a critical interface in the packing is removed thereby resulting in distinctly reducing the thermomechanical stresses.

Abstract: Support matrices for semiconductors are often encapsulated in a region of the bonding leads, the so-called bonding channel. The encapsulation is effected using a dispensable material that can flow onto the support matrix and causes contamination there. In order to prevent this flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding channel. In the bonding channel bonding leads or wires for connecting the conductor track structures to the integrated semiconductor are disposed. Disposed along the edge of the bonding channel a barrier for preventing the flow of flowable material from the bonding channel onto the frame and/or the conductor track structures. A method for producing such support matrices is likewise disclosed.

Abstract: A supporting structure for a chip includes a supporting substrate with a bond opening therein and an interconnect layer on the supporting substrate. In the interconnect layer, a bonding channel overlapping with the bond opening is formed. The supporting structure further includes an escape prevention structure for the bonding channel to enable escaping of air from the bonding channel and to prevent the encapsulation material from escaping from the bonding channel on introducing encapsulation material into the bonding channel after the applying of a chip to the supporting structure.

Abstract: The invention relates to a method of marking substandard parts on system carriers for chip mounting. The invention is intended to provide a method of marking substandard parts in which, without special effort, a permanent marking that can easily be detected by an optical recognition system and having adequate contrast can be produced, and in which the occurrence of the stamp effect is reliably avoided. According to the invention, for the marking of substandard parts on the system carrier, use is made of a permanent, non-detachable BUM marking the appearance of which is distinct from the surrounds. This can be carried out by removing material from the surface of the system carrier or by means of a deposition method. Other possibilities exist by means of applying heat at a point or chemical marking. so that a locally limited, permanent appearance, e.g. color change of the substrate close to the surface or of the metal deposited on the said substrate is effected in the area of the BUM marking.

Abstract: Support matrices for semiconductors are often disposed with spacers on the semiconductor chip. The spacers are composed of silicone that flows into the region of the bonding leads and prevents reliable electrical connection of the bonding leads to the semiconductor chip. In order to prevent the flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding lead for connecting the conductor track structures to the integrated semiconductor. The bonding lead has, between a bonding region and the conductor track structures, at least one barrier for preventing the flow of flowable material onto the bonding region. A method for producing such support matrices is likewise described.

Abstract: Support matrices for semiconductors are often disposed with spacers on the semiconductor chip. The spacers are composed of silicone that flows into the region of the bonding leads and prevents reliable electrical connection of the bonding leads to the semiconductor chip. In order to prevent the flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding lead for connecting the conductor track structures to the integrated semiconductor. The bonding lead has, between a bonding region and the conductor track structures, at least one barrier for preventing the flow of flowable material onto the bonding region. A method for producing such support matrices is likewise described.

Abstract: Support matrices for semiconductors are often encapsulated in a region of the bonding leads, the so-called bonding channel. The encapsulation is effected using a dispensable material that can flow onto the support matrix and causes contamination there. In order to prevent this flow, the support matrix for integrated semiconductors has a frame, conductor track structures and at least one bonding channel. In the bonding channel bonding leads or wires for connecting the conductor track structures to the integrated semiconductor are disposed. Disposed along the edge of the bonding channel a barrier for preventing the flow of flowable material from the bonding channel onto the frame and/or the conductor track structures. A method for producing such support matrices is likewise disclosed.