Abstract: The process according to the invention is applicable to a non-volatile memory cell with an MOS transistor structure with an insulated floating gate, a control electrode coupled capacitively to the floating gate and an injection zone separated from the floating gate by an injection oxide and capable of injecting or extracting charges into or from the floating gate. The process is characterized in that the control electrode is subjected to an alternating voltage of decreasing amplitude and the injection zone is subjected to a voltage representing the quantity to be stored. The invention applies to the storage of analog quantities.

Abstract: The invention concerns an amplifier comprising means for compensating for the input drift voltage. During a preparation phase, the input signal of the amplifier (10) is nullified by short-circuiting the inputs (12) and (13) by means of the change-over switch (30) and the output (15) is connected to a capacitor (40) and to a secondary input (14) of the amplifier. The secondary input has a substantially lower gain than the gain relative to the main input (13), which makes it possible substantially to reduce the effect of charge injection caused by opening of the switch (60). In the amplification phase, the input (13) receives an input signal (V1) and the input drift voltage (.alpha.V) is compensated by means of the value stored in the capacitor (40).

Abstract: A CMOS integrated circuit structure is provided having circuit elements which can function as high resistances or stable current sources. The circuit elements include a region of intermediate doping which has a surface concentration between that of a substrate and a homogeneous region of a doped pocket formed therein. The region of intermediate doping is formed by the vicinity of two pocket edges, these edges being separated by a distance which is substantially not greater than twice the length of the lateral diffusion of the doping of the pockets.

Abstract: The invention relates to logic CMOS transistor circuits formed by at least one gate circuit, each gate circuit comprising a pair of CMOS transistor groups connected in series between the terminals of a power supply. The conductive state of both groups of transistors defines the potential of a common connection point or output node. A power dissipating means of relatively high resistance is coupled in parallel with at least a part of at least one of the said transistor groups, at least during a time interval in which both groups are in a non conductive state. This results in a quasi static behavior of the circuits according to the invention although the basic structure of the same is that of dynamic circuits.

Abstract: An integrated circuit comprises complementary FET having channels extending on the surface of a substrate and on the surface of a well in the substrate and gates formed in a layer of polycrystalline silicon insulated from the substrate and from each said well. A floating diode, i.e. connected neither to the substrate, nor to a well, is formed simultaneously with the FET by depositing and selectively etching a first doped oxide to cover a first region of the polycrystalline silicon, depositing an oppositely doped oxide over the remainder using the first oxide as mask, and oppositely doping the two regions of polycrystalline silicon by heat treatment. Alternatively, the second region can be doped by treatment in a gaseous phase or by ionic implantation, in either case using the first oxide as mask.

Abstract: A device for providing an electro-optical display of time comprises an electronic timekeeper fed by a voltage source and including a time base and a frequency divider. An electro-optical display is formed of groups of electro-chromic cells each able to take two different visual aspects. The cells are controlled by a code converter supplying state variables corresponding to the desired aspects of the cells to provide a display of time. One aspect of the cells corresponds to a stable state, the other aspect to a quasi-stable state which in order to be maintained, requires very low or zero power. Transition of a cell from one state to another requires precisely determined amounts of energy. A change detector supplies to a selector, data to actuate the operations of inscription and erasure of the display cells.