Patents by Inventor Henricus Godefridus Rafael Maas

Henricus Godefridus Rafael Maas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7845378
    Abstract: A method for bonding two plate-shaped objects (5) with an adhesive which is cured by ultraviolet light irradiation and by heating. The two plate-shaped objects (5) with the adhesive in between are transported into a cure chamber (11) comprising an ultraviolet lamp (12) and a heating element (13). A movable heat-shielding member (3) is temporary present between the objects (5) and the heating element (13) during at least the first part of the irradiation treatment. Preferably, the heat-shielding member (3) is positioned outside the cure chamber (11) during a part of the cure treatment.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: December 7, 2010
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Henricus Godefridus Rafael Maas, Theodorus Martinus Michielsen, Richard Jozef Maria Waelen
  • Patent number: 7271075
    Abstract: A method for bonding two plate-shaped objects (5) with an adhesive which is cured by ultraviolet light irradiation and by heating. The two plate-shaped objects (5) with the adhesive in between are transported into a cure chamber (11) comprising an ultraviolet lamp (12) and a heating element (13). A moveable heat-shielding member (3) is temporary present between the objects (5) and the heating element (13) during at least the first part of the irradiation treatment. Preferably, the heat-shielding member (3) is positioned outside the cure chamber (11) during a part of the curve treatment.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: September 18, 2007
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Henricus Godefridus Rafael Maas, Theodorus Martinus Michielsen, Richard Jozef Maria Waelen
  • Patent number: 7027269
    Abstract: A simple method of manufacturing a magnetic head having a head face and including a planar magnetic coil (7) which extends parallel to the head face. According to the method, the magnetic coil is formed at a first side of a first substrate (1). Thereafter, the first substrate provided with the magnetic coil is adhered with its first side to a side of a second substrate, whereafter material of the first substrate is removed from a second side of the first substrate (9), the second side being turned away from the first side, in order to form the head face, in such a manner that the magnetic coil is situated near to the head face.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: April 11, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Frank Cornelis Penning, Ronald Dekker, Henricus Godefridus Rafael Maas
  • Patent number: 6775350
    Abstract: A method of examining a wafer of crystalline semiconductor material by means of X-rays, in which method a surface of the wafer is scanned by means of an X-ray beam and secondary radiation generated by said X-ray beam is detected. Prior to the examination the surface of the wafer which is to be scanned by the X-ray beam during the examination is glued to a substrate, after which crystalline semiconductor material is removed at the side which is then exposed, removal taking place as far as the top layer which adjoins the surface. The top layer can thus be examined without the examination being affected by crystal defects or impurities present in layers of the wafer which are situated underneath the top layer.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: August 10, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Catharina Huberta Henrica Emons, Henricus Godefridus Rafael Maas, Theodorus Martinus Michielsen, Ronald Dekker, Antonius Johannes Janssen, Ingrid Annemarie Rink
  • Patent number: 6762510
    Abstract: A flexible monolithic integrated circuit which is essentially formed from flexible circuit elements, connecting elements between the flexible circuit elements, and a flexible coating which comprises at least one layer of a coating material comprising a polymer, is suitable as a small and convenient integrated circuit for electronic devices on flexible data carriers for the logistic tracking of objects and persons. The invention also relates to a method of manufacturing a flexible integrated monolithic circuit whereby integrated monolithic circuit elements and connecting elements are formed in and on a semiconductor substrate, the main surface of the integrated circuit elements facing away from the semiconductor substrate are coated with a polymer resin, and the semiconductor substrate is removed. The method is based on conventional process steps in semiconductor technology and leads to a flexible integrated monolithic circuit in a small number of process steps.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: July 13, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Johann-Heinrich Fock, Wolfgang Schnitt, Hauke Pohlmann, Andreas Gakis, Michael Burnus, Martin Schaefer, Henricus Godefridus Rafael Maas, Theodorus Martinus Michielsen, Ronald Dekker
  • Patent number: 6698073
    Abstract: A method of manufacturing a piezoelectric filter with a resonator comprising a layer of a piezoelectric material (1) which is provided with an electrode (2,3) on either side, which resonator is situated on an acoustic reflector layer (4) formed on a surface (6) of a carrier substrate (7). In the method, the layer of piezoelectric material (1) is provided on a surface (8) of an auxiliary substrate (9), after which a first electrode (2) is formed on the layer of piezoelectric material (1). The acoustic reflector layer (4) is provided on and next to the first electrode (2), and the structure thus formed is secured with the side facing away from the auxiliary substrate (9) on the carrier substrate (7). The auxiliary substrate (9) is removed and a second electrode (3) situated opposite the first electrode (2) is provided.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: March 2, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas
  • Patent number: 6593628
    Abstract: The invention relates to an essentially discrete semiconductor device comprising a semiconductor body (10) having a first, preferably bipolar, transistor (T1) with a first region (1) forming a collector (1) of T1, and a second, preferably also bipolar, transistor (T2) with a second region (2) forming a collector (2) of T2, which transistors (T1, T2) are in a cascode configuration wherein the collector (1) of T1is connected to the emitter (4) of T2. Such a device cannot suitably be used in a base station for mobile communication. According to the invention, the first region (1) and the second region (2) are positioned next to each other within a semiconductor region (5), a part of which situated below the first region (1) is provided with a higher doping concentration at the location of T1. In this way, T1 has a low collector-emitter breakdown voltage and a high cutoff frequency, whereas for T2 said voltage and frequency are, respectively, high(er) and low(er).
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: July 15, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas, Jan Willem Slotboom, Freerk Van Rijs
  • Patent number: 6562694
    Abstract: A method of manufacturing a semiconductor device including semiconductor elements having semiconductor zones (17, 18, 24, 44, 45) formed in a top layer (4) of a silicon wafer (1) situated on a buried insulating layer (2). In this method, a first series of process steps are carried out, commonly referred to as front-end processing, wherein, inter alia, the silicon wafer is heated to temperatures above 700° C. Subsequently, trenches (25) are formed in the top layer, which extend as far as the buried insulating layer and do not intersect pn-junctions. After said trenches have been filled with insulating material (26, 29), the semiconductor device is completed in a second series of process steps, commonly referred to as back-end processing, wherein the temperature of the wafer does not exceed 400° C. The trenches are filled in a deposition process wherein the wafer is heated to a temperature which does not exceed 500° C.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: May 13, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas, Cornelis Eustatius Timmering, Pascal Henri Leon Bancken
  • Publication number: 20030057525
    Abstract: A flexible monolithic integrated circuit which is essentially formed from flexible circuit elements, connecting elements between the flexible circuit elements, and a flexible coating which comprises at least one layer of a coating material comprising a polymer, is suitable as a small and convenient integrated circuit for electronic devices on flexible data carriers for the logistic tracking of objects and persons.
    Type: Application
    Filed: May 8, 2002
    Publication date: March 27, 2003
    Inventors: Johann-Heinrich Fock, Wolfgang Schnitt, Hauke Pohlmann, Andreas Gakis, Michael Burnus, Martin Schaefer, Henricus Godefridus Rafael Maas, Theodorus Martinus Michielsen, Ronald Dekker
  • Publication number: 20030053590
    Abstract: A method of examining a wafer of crystalline semiconductor material by means of X-rays, in which method a surface of the wafer is scanned by means of an X-ray beam and secondary radiation generated by said X-ray beam is detected. Prior to the examination the surface of the wafer which is to be scanned by the X-ray beam during the examination is glued to a substrate, after which crystalline semiconductor material is removed at the side which is then exposed, removal taking place as far as the top layer which adjoins the surface. The top layer can thus be examined without the examination being affected by crystal defects or impurities present in layers of the wafer which are situated underneath the top layer.
    Type: Application
    Filed: September 13, 2002
    Publication date: March 20, 2003
    Inventors: Catharina Huberta Henrica Emons, Henricus Godefridus Rafael Maas, Theodorus Martinus Michielsen, Ronald Dekker, Antonius Johannes Janssen, Ingrid Annemarie Rink
  • Patent number: 6452272
    Abstract: A semiconductor device 1 comprises a body 2 of insulating material having a surface 3 to which a semiconductor element 4 and an interconnect structure 5 are fastened, which interconnect structure 5 is disposed between the semiconductor element 4 and the body 2 of insulating material and has a patterned metal layer 7 facing the body 2 of insulating material, which patterned metal layer 7 comprises conductor tracks 8 and 9. In order to reduce the power consumption of the semiconductor device 1, an insulating layer 12 having a dielectric constant ∈r below 3 is disposed between the patterned metal layer 7 of the interconnect structure 5 and the body 2 of insulating material, and an insulating barrier layer 13 is disposed between the semiconductor element 4 and the insulating layer 12 having a dielectric constant ∈r below 3, so as to counteract that contaminants from the insulating layer 12 having a dielectric constant ∈r below 3 can reach the semiconductor element 4.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: September 17, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Henricus Godefridus Rafael Maas, Maria Henrica Wilhelmina Antonia Van Deurzen
  • Patent number: 6387769
    Abstract: A method of producing a Schottky varicap (25) including: (a) providing an epitaxial layer (12) on a semiconductor substrate (1); (b) providing an insulating layer including an oxide layer and a nitride layer on a predetermined area of the surface of the epitaxial layer (12); (c) depositing a polysilicon layer (6); (d) applying a first high temperature step to diffuse a guard ring (10) around the first predetermined area; (e) removing a predetermined portion of the polysilicon layer (6) to expose the first silicon nitride film (5); (f) implanting atoms through at least the first oxide film (4) to provide a predetermined varicap doping profile; (g) applying a second high temperature step to anneal and activate the varicap doping profile; (h) removing the first oxide film (4) to provide an exposed area; (i) providing a Schottky electrode (17) on the exposed area.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: May 14, 2002
    Assignee: U.S. Philips Corporation
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas, Anco Heringa, Holger Schligtenhorst
  • Patent number: 6379987
    Abstract: A method of manufacturing a hybrid integrated circuit comprising a semiconductor element (1) and a piezoelectric filter (2), which are situated next to each other and connected to a carrier substrate (3). The semiconductor element comprises semiconductor regions (5, 6) which are formed in a silicon layer (13, 28); the piezoelectric filter comprises an acoustic resonator (8, 9, 10) which is situated on an acoustic reflector layer (7), which acoustic resonator comprises a layer of piezoelectric material (8), a first electrode (9) situated between the layer of piezoelectric material and the acoustic reflector layer, and a second electrode (10) which is situated on the opposite side of the piezoelectric layer and faces the first electrode. In the method, the semiconductor element is formed on the first side (11) of a silicon wafer (12, 25).
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: April 30, 2002
    Assignee: U.S. Philips Corporation
    Inventors: Ronald Dekker, Wilhelmus Mathias Clemens Dolmans, Lukas Leyten, Henricus Godefridus Rafael Maas
  • Publication number: 20020031855
    Abstract: A method of manufacturing a hybrid integrated circuit comprising a semiconductor element (1) and a piezoelectric filter (2), which are situated next to each other and connected to a carrier substrate (3). The semiconductor element comprises semiconductor regions (5, 6) which are formed in a silicon layer (13, 28); the piezoelectric filter comprises an acoustic resonator (8, 9, 10) which is situated on an acoustic reflector layer (7), which acoustic resonator comprises a layer of piezoelectric material (8), a first electrode (9) situated between the layer of piezoelectric material and the acoustic reflector layer, and a second electrode (10) which is situated on the opposite side of the piezoelectric layer and faces the first electrode. In the method, the semiconductor element is formed on the first side (11) of a silicon wafer (12, 25).
    Type: Application
    Filed: February 21, 2001
    Publication date: March 14, 2002
    Inventors: Ronald Dekker, Wilhelmus Mathias Clemens Dolmans, Lukas Leyten, Henricus Godefridus Rafael Maas
  • Publication number: 20020031056
    Abstract: A simple method of manufacturing a magnetic head having a head face and including a planar magnetic coil (7) which extends parallel to the head face. According to the method, the magnetic coil is formed at a first side of a first substrate (1). Thereafter, the first substrate provided with the magnetic coil is adhered with its first side to a side of a second substrate, whereafter material of the first substrate is removed from a second side of the first substrate (9), the second side being turned away from the first side, in order to form the head face, in such a manner that the magnetic coil is situated near to the head face.
    Type: Application
    Filed: August 7, 2001
    Publication date: March 14, 2002
    Inventors: Frank Cornelis Penning, Ronald Dekker, Henricus Godefridus Rafael Maas
  • Publication number: 20010045619
    Abstract: The invention relates to an essentially discrete semiconductor device comprising a semiconductor body (10) having a first, preferably bipolar, transistor (T1) with a first region (1) forming a collector (1) of T1, and a second, preferably also bipolar, transistor (T2) with a second region (2) forming a collector (2) of T2, which transistors (T1, T2) are in a cascode configuration wherein the collector (1) of T1 is connected to the emitter (4) of T2. Such a device cannot suitably be used in a base station for mobile communication.
    Type: Application
    Filed: March 28, 2001
    Publication date: November 29, 2001
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas, Jan Willem Slotboom, Freerk Van Rijs
  • Publication number: 20010031538
    Abstract: A method of producing a Schottky varicap (25) including:
    Type: Application
    Filed: March 1, 2001
    Publication date: October 18, 2001
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas, Anco Heringa, Holger Schligtenhorst
  • Publication number: 20010023114
    Abstract: A method of manufacturing a semiconductor device comprising semiconductor elements having semiconductor zones (17, 18, 24, 44, 45) formed in a top layer (4) of a silicon wafer (1) situated on a buried insulating layer (2). In this method, a first series of process steps are carried out, commonly referred to as front-end processing, wherein, inter alia, the silicon wafer is heated to temperatures above 700° C. Subsequently, trenches (25) are formed in the top layer, which extend as far as the buried insulating layer and do not intersect pn-junctions. After said trenches have been filled with insulating material (26, 29), the semiconductor device is completed in a second series of process steps, commonly referred to as back-end processing, wherein the temperature of the wafer does not exceed 400° C. The trenches are filled in a deposition process wherein the wafer is heated to a temperature which does not exceed 500° C.
    Type: Application
    Filed: December 21, 2000
    Publication date: September 20, 2001
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas, Cornelis Eustatius Timmering, Pascal Henri Leon Bancken
  • Publication number: 20010023084
    Abstract: A method of manufacturing a piezoelectric filter with a resonator comprising a layer of a piezoelectric material (1) which is provided with an electrode (2,3) on either side, which resonator is situated on an acoustic reflector layer (4) formed on a surface (6) of a carrier substrate (7). In the method, the layer of piezoelectric material (1) is provided on a surface (8) of an auxiliary substrate (9), after which a first electrode (2) is formed on the layer of piezoelectric material (1). The acoustic reflector layer (4) is provided on and next to the first electrode (2), and the structure thus formed is secured with the side facing away from the auxiliary substrate (9) on the carrier substrate (7). The auxiliary substrate (9) is removed and a second electrode (3) situated opposite the first electrode (2) is provided.
    Type: Application
    Filed: February 21, 2001
    Publication date: September 20, 2001
    Inventors: Ronald Dekker, Henricus Godefridus Rafael Maas