Abstract: The present invention relates to a detection circuit (100) capable to detect a rectified phase-cut or sinusoidal wave-form using its duty cycle or average value and in response, to select the respective dim mode amongst the linear phase-cut and step-dimming. The circuit (100) receives the rectified waveform with its duty cycle, which is derived through a comparator (22, 24) and converted into a DC signal. The latter which is controlled by the duty cycle is then compared to a reference level (40) through another comparator (20) that, in response, supplies a signal controlling a switching device (30). The switching device (30) will be thus automatically connected either to one set signal level when the DC signal is greater than the reference level (40), namely when the circuit (100) detects a rectified sinusoidal waveform, or to the same level as the DC signal when the DC signal is less than the reference level (40), namely when the circuit (100) detects a rectified phase-cut waveform.

Abstract: The present invention relates to a dimmer control circuit (100) capable to detect whether a phase-cut dimmer is connected using an average signal (VDCI) derived from the mains voltage. The average signal (VDCI) or a signal (VDCI_ls) derived from (VDCI), ranging from a minimum value to a maximum value, is compared to a dimming threshold (Vdim_th) through a phase-cut detecting unit (20). The comparison result is used to control the state diagram of a dimmer control logic (40) by selecting the step dimming mode (STD) or the phase-cut dimming mode (PCD). The output (OUT) of a switching unit (30) is determined by the state diagram of the dimmer control logic (40) in such a manner that the phase-cut dimming mode (PCD) is prioritized above the step-dimming mode (STD) and the maximum level of the STD states is depending on the mains voltage and application adjustable.

Abstract: The present invention relates to a dimmer control circuit (100) capable to detect whether a phase-cut dimmer is connected using an average signal (VDCI) derived from the mains voltage. The average signal (VDCI) or a signal (VDCI_ls) derived from (VDCI), ranging from a minimum value to a maximum value, is compared to a dimming threshold (Vdim_th) through a phase-cut detecting unit (20). The comparison result is used to control the state diagram of a dimmer control logic (40) by selecting the step dimming mode (STD) or the phase-cut dimming mode (PCD). The output (OUT) of a switching unit (30) is determined by the state diagram of the dimmer control logic (40) in such a manner that the phase-cut dimming mode (PCD) is prioritized above the step-dimming mode (STD) and the maximum level of the STD states is depending on the mains voltage and application adjustable.

Abstract: A method of controlling a Fluorescent Lamp (CFL) is disclosed, which enables the lamp to be dimmed during a quick-start mode in which the lamp current may be boosted. The method involves determining a boost value and a dimming value, and controlling the lamp power in dependence on the boost and dimming values. A dimming threshold may be set, below which (i.e. at dimmer output light levels) the boost function is disabled. Hysteresis may be included in the control, in order to avoid hopping between modes. A controller for use with a fluorescent lamp which is adapted to operate according to such a method and a fluorescent lamp using such a controller are also disclosed.

Abstract: The present invention relates to a detection circuit (100) capable to detect a rectified phase-cut or sinusoidal wave-form using its duty cycle or average value and in response, to select the respective dim mode amongst the linear phase-cut and step-dimming. The circuit (100) receives the rectified waveform with its duty cycle, which is derived through a comparator (22, 24) and converted into a DC signal. The latter which is controlled by the duty cycle is then compared to a reference level (40) through another comparator (20) that, in response, supplies a signal controlling a switching device (30). The switching device (30) will be thus automatically connected either to one set signal level when the DC signal is greater than the reference level (40), namely when the circuit (100) detects a rectified sinusoidal waveform, or to the same level as the DC signal when the DC signal is less than the reference level (40), namely when the circuit (100) detects a rectified phase-cut waveform.

Abstract: An emitter-coupled transistor pair consisting of a first (T1) and a second (T2) transistor in which the a.c. component (+ib) in the base-current of the first transistor is compensated for by the a.c. component (-ib) of the second transistor. A replica of the later a.c. component (-ib) is available in the base-current of a third transistor (T3) which has its collector-emitter path connected in the collector line of the second transistor and which has its base coupled to the base of the first transistor.

Abstract: Self-adjusting frequency demodulation circuit comprising a frequency demodulator (13) which is designed as an integrated circuit, the adjustment being effected with the aid of a calibration signal source (7) of one single frequency and a measuring circuit (113, 35, 101) coupled to an output (113) of the frequency demodulator (13) by controlling the output signal amplitude of the frequency demodulation circuit with a multiplier (21) which is controllable by the measuring circuit and forms part of a tuning correction circuit which optionally may further include a level shifting circuit (57). The frequency demodulation circuit is particularly suitable for use in a SECAM color television receiver, only one frequency demodulator then being required for demodulating both the two color difference signals and the identification signal.

Abstract: A PAL-NTSC color television standard identification circuit, comprising a first demodulation circuit (7) for a reference component and a second demodulation circuit (11) for a possible color identification component of a color synchronizing signal, can perform a reliable identification by means of a digital decoding circuit (81) for the output signals of the demodulation circuits if the second demodulation circuit (11) is adapted (41, 45, 49) to demodulate along an axis slightly differing from the axis of the color identification component (FIG. 1).