Patents by Inventor Henrik Asendorf

Henrik Asendorf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11635461
    Abstract: A test apparatus and method for testing a semiconductor device. The semiconductor device includes an integrated circuit and a plurality of external radiating elements located at a surface of the device. The external radiating elements include at least one transmit element and receive element. The test apparatus includes a plunger. The plunger includes a dielectric portion having a surface for placing against the surface of the device. The plunger also includes at least one waveguide. Each waveguide extends through the plunger for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the device. The dielectric portion is configured to provide a matched interface for the electromagnetic coupling of the waveguide openings to the plurality of external radiating elements of the device.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: April 25, 2023
    Assignee: NXP B.V.
    Inventors: Abdellatif Zanati, Henrik Asendorf, Jan-Peter Schat, Nicolas Lamielle
  • Patent number: 11415626
    Abstract: A method of testing a semiconductor device. An apparatus comprising a semiconductor device and a test apparatus. The semiconductor device includes an integrated circuit and a plurality of external radiating elements at a surface of the device, the radiating elements include transmit elements and receive elements. The test apparatus includes a surface for placing against the surface of the device. The test apparatus also includes at least one waveguide, which extends through the test apparatus for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the plurality of radiating elements located at the surface of the device. A spacing between the waveguide openings of each waveguide is larger than, or smaller than a spacing between the corresponding radiating elements.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: August 16, 2022
    Assignee: NXP B.V.
    Inventors: Jan-Peter Schat, Abdellatif Zanati, Henrik Asendorf, Maristella Spella, Waqas Hassan Syed, Giorgio Carluccio, Antonius Johannes Matheus de Graauw
  • Publication number: 20210239753
    Abstract: A test apparatus and method for testing a semiconductor device. The semiconductor device includes an integrated circuit and a plurality of external radiating elements located at a surface of the device. The external radiating elements include at least one transmit element and receive element. The test apparatus includes a plunger. The plunger includes a dielectric portion having a surface for placing against the surface of the device. The plunger also includes at least one waveguide. Each waveguide extends through the plunger for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the device. The dielectric portion is configured to provide a matched interface for the electromagnetic coupling of the waveguide openings to the plurality of external radiating elements of the device.
    Type: Application
    Filed: December 8, 2020
    Publication date: August 5, 2021
    Inventors: Abdellatif Zanati, Henrik Asendorf, Jan-Peter Schat, Nicolas Lamielle
  • Publication number: 20210239754
    Abstract: A method of testing a semiconductor device. An apparatus comprising a semiconductor device and a test apparatus. The semiconductor device includes an integrated circuit and a plurality of external radiating elements at a surface of the device, the radiating elements include transmit elements and receive elements. The test apparatus includes a surface for placing against the surface of the device. The test apparatus also includes at least one waveguide, which extends through the test apparatus for routing electromagnetic radiation transmitted by one of the transmit elements of the device to one of the receive elements of the device. Each waveguide comprises a plurality of waveguide openings for coupling electromagnetically to corresponding radiating elements of the plurality of radiating elements located at the surface of the device. A spacing between the waveguide openings of each waveguide is larger than, or smaller than a spacing between the corresponding radiating elements.
    Type: Application
    Filed: December 11, 2020
    Publication date: August 5, 2021
    Inventors: Jan-Peter Schat, Abdellatif Zanati, Henrik Asendorf, Maristella Spella, Waqas Hassan Syed, Giorgio Carluccio, Antonius Johannes Matheus de Graauw