Abstract: An apparatus having an input transmission line, a plurality of amplifiers and an output transmission line is disclosed. The input transmission line may include a plurality of first inductors configured to receive an input voltage. The amplifiers may be configured to generate a plurality of intermediate currents by amplifying a plurality of intermediate voltages at a plurality of first nodes between the first inductors. The output transmission line generally includes a plurality of second inductors configured to generate an output current at an output node by combining the intermediate currents. Each of a plurality of second nodes connected to the second inductors may transfer a plurality of the intermediate currents. Each of the second inductors generally has a different one of a plurality of inductance values.

Abstract: An apparatus comprising a power amplifier and a control circuit. The power amplifier may be configured to generate an output signal in response to an input signal and a control signal. The control circuit may be configured to present (i) a bias signal as the control signal during un-regulated conditions and (ii) a power down voltage as the control signal when one or more predetermined design parameters are exceeded. The magnitude of the control signal may be configured to dynamically adjust a power level of the output signal. The power down voltage may be generated by sampling the input signal.

Abstract: A device for interfacing with multiple different types of network access points includes multiple power amplifiers, a switch and a power detecting circuit. The power amplifiers are configured to provide corresponding signals associated with the different types of network access points, each signal having at least one parameter different than a corresponding parameter in another signal. The switch is configured to select one of the signals to provide an output signal. The power detecting circuit is configured to detect power of the output signal, and includes multiple states corresponding to the multiple different types of network access points. The power detecting circuit outputs a voltage level within the same voltage range for the signals in response to the multiple states corresponding to the different types of network access points with which the signals are associated.

Abstract: A device for interfacing with multiple different types of network access points includes multiple power amplifiers, a switch and a power detecting circuit. The power amplifiers are configured to provide corresponding signals associated with the different types of network access points, each signal having at least one parameter different than a corresponding parameter in another signal. The switch is configured to select one of the signals to provide an output signal. The power detecting circuit is configured to detect power of the output signal, and includes multiple states corresponding to the multiple different types of network access points. The power detecting circuit outputs a voltage level within the same voltage range for the signals in response to the multiple states corresponding to the different types of network access points with which the signals are associated.

Abstract: A multi-mode integrated circuit structure. In one embodiment, an integrated circuit structure includes a first die having at least one first component disposed on a face, the first die fabricated using a first process that is optimal for operating the component in an first mode and a second die stacked on the first die, the second die having at least one second component disposed on a face and the second die fabricated using a second process separate from the first process that is optimal for operating the second component in a second mode. As such, the integrated circuit structure provides an electronic device with a single integrated circuit structure for performing operations optimally in more than one mode, such as operations in enhancement mode and operations in depletion mode.

Abstract: A multi-mode integrated circuit structure. In one embodiment, an integrated circuit structure includes a first die having at least one first component disposed on a face, the first die fabricated using a first process that is optimal for operating the component in an first mode and a second die stacked on the first die, the second die having at least one second component disposed on a face and the second die fabricated using a second process separate from the first process that is optimal for operating the second component in a second mode. As such, the integrated circuit structure provides an electronic device with a single integrated circuit structure for performing operations optimally in more than one mode, such as operations in enhancement mode and operations in depletion mode.

Abstract: A multi-mode integrated circuit structure. In one embodiment, an integrated circuit structure includes a first die having at least one first component disposed on a face, the first die fabricated using a first process that is optimal for operating the component in an first mode and a second die stacked on the first die, the second die having at least one second component disposed on a face and the second die fabricated using a second process separate from the first process that is optimal for operating the second component in a second mode. As such, the integrated circuit structure provides an electronic device with a single integrated circuit structure for performing operations optimally in more than one mode, such as operations in enhancement mode and operations in depletion mode.

Abstract: A multi-mode integrated circuit structure. In one embodiment, an integrated circuit structure includes a first die having at least one first component disposed on a face, the first die fabricated using a first process that is optimal for operating the component in an first mode and a second die stacked on the first die, the second die having at least one second component disposed on a face and the second die fabricated using a second process separate from the first process that is optimal for operating the second component in a second mode. As such, the integrated circuit structure provides an electronic device with a single integrated circuit structure for performing operations optimally in more than one mode, such as operations in enhancement mode and operations in depletion mode.

Abstract: An amplifier/switch circuit includes a first circuit input, a second circuit input, a circuit output, an amplifier, a switching circuit and a DC blocking capacitor. The amplifier has an amplifier control input, a first amplifier output and a second amplifier output. The amplifier control input is connected to the first circuit input. The first amplifier output is connected to the second circuit input. The second amplifier output is connected to the circuit output. A switching circuit has a switch control input, a switch input and a switch output. The switch control input is connected to the circuit output. The control input is connected to the second circuit input. The DC blocking capacitor is connected between the amplifier control input of the first transistor and the switch input.

Abstract: An amplifier/switch circuit includes a first circuit input, a second circuit input, a circuit output, an amplifier, a switching circuit and a DC blocking capacitor. The amplifier has an amplifier control input, a first amplifier output and a second amplifier output. The amplifier control input is connected to the first circuit input. The first amplifier output is connected to the second circuit input. The second amplifier output is connected to the circuit output. A switching circuit has a switch control input, a switch input and a switch output. The switch control input is connected to the circuit output. The control input is connected to the second circuit input. The DC blocking capacitor is connected between the amplifier control input of the first transistor and the switch input.