Abstract: A communication method and apparatus incorporating fault-tolerance and increased transmission reliability in a content-induced transaction overlap (CITO) system is disclosed. The system is driven by an error-detecting and correcting CITO-based protocol whereby transient failures are transparent to the user. A parity check is built into the protocol for detecting failures due to hard faults. A redundancy configuration is also disclosed which permits circumvention of fabrication defects, thereby allowing an increased manufacturing yield.

Abstract: A method for synchronizing a distributed multiple clock system in which the first clock to reach a first predetermined number of counts generates a polling request signal. The remaining clocks compare the content of their counters to determine if they are in synchronization with the clock that generated the polling request signal. Each clock will place itself inactive if it determines it is out of synchronization with the active clocks. The first active clock to reach a second predetermined number of counts will generate a synchronization interrupt signal which resets a counter in each clock to zero. A start subroutine readmits inactive clocks when after a synchronization interrupt signal is generated its counts are within a predetermined readmittance range or its counter counts up to a third predetermined value.

Abstract: A method and apparatus is described for distributing data in a hierarchically connected system (10) comprising a plurality of nodes (12-25) at each of a plurality of hierarchical levels, one or more bidirectional buses (29-30, 31,32) interconnecting mutually exclusive nodes at each hierarchical level, and a sender (49) for receiving and transmitting data located at each node (12-25) for transmitting and receiving data under the Content Induced Transaction Overlap (CITO) protocol and for transmitting and receiving data without regard to the CITO protocol. Each bidirectional bus (27-32) is interconnected through a node to a node on a bidirectional bus at a higher hierarchical level. Several virtual buses may be formed for distribution of the messages over one or more bidirectional buses (27-33) by controlling the senders (90,92,94,96) at each node by a slot controller (88) which activates the senders (90,92,94,96) as a function of time slot.

Abstract: A pulse width discriminator using a negative logic technique including two monostable multivibrators for generating test pulses and a D-latch for generating an output signal in response to the test pulses indicating that the received signal is of a predetermined length.

Abstract: A single line refigurable power transmission and signal multiplexing system having a central processor and a plurality of remotely located devices such as sensors, actuators and associated interfaces. Communications between the central processor and the remote devices is accomplished via a single bi-directional transmission line. A negative logic pulse width encoding technique is utilized to facilitate power and signal transmission. Selective activation is accomplished by a pulse width discriminator associated with each interface which employs a two-part recognition test to identify specific pulse width signals.