Abstract: A DRAM memory device capable of volatile, and non-volatile memory functions is provided. To achieve non-volatile memory functions a programming voltage is applied to DRAM memory cells consisting of a wordline, a bitline, a transistor, and a capacitive storage device. The programming voltage permanently alters the voltage leakage characteristics of the capacitive storage device. The DRAM memory device can then be read the memory cells by determining which cells have greater voltage leakage characteristics.

Abstract: The invention comprises a device that internally self-generates a clock signal, and provides methods for adjusting the clock signal through the use of a reference frequency. The device is composed of a plurality of propagation delay devices. The propagation devices can be individually selected as to allow a signal to propagate through them, or to not allow a signal to pass. The device creates a clock signal by setting a logical condition at the start of the propagation devices, allowing a signal to pass through, and then changing the inputted logical condition. The time it takes to pass through the devices depends on the number of devices selected. Therefore with the changing of the logical conditions at the output of the device a clock signal can be created. To determine the frequency of the output signal, the output is compared to a known frequency of a reference signal which can originate from an inexpensive external crystal oscillator.

Abstract: A method of utilizing DRAM which may contain defective memory locations. The invention describes a method and two algorithms. In a data processing system a processor will make requests to a memory using logical addresses. A translator is used to determine what physical address in the memory device corresponds to a logical address. In the general methodology, a set of logical addresses is assigned corresponding to physical memory locations. The memory device is then mapped to determine which memory locations are defective. The invention outlines a method where a defective physical address that corresponds to a logical address is swapped with a non-defective physical address. The advantages of the invention include not needing redundant memory, fuses, a time consuming burn-in procedure, and allowing the device to repair memory locations that might become defective during the operation of the device.