Patents by Inventor Henry Frank Erk

Henry Frank Erk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848227
    Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a step of high pressure bonding.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: December 19, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Sasha Joseph Kweskin, Henry Frank Erk
  • Patent number: 11798835
    Abstract: Methods for removing an oxide film from a silicon-on-insulator structure are disclosed. The oxide may be stripped from a SOI structure before deposition of an epitaxial silicon thickening layer. The oxide film may be removed by dispensing an etching solution toward a center region of the SOI structure and dispensing an etching solution to an edge region of the structure.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: October 24, 2023
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Charles R. Lottes, Shawn George Thomas, Henry Frank Erk
  • Publication number: 20220165609
    Abstract: Methods for removing an oxide film from a silicon-on-insulator structure are disclosed. The oxide may be stripped from a SOI structure before deposition of an epitaxial silicon thickening layer. The oxide film may be removed by dispensing an etching solution toward a center region of the SOI structure and dispensing an etching solution to an edge region of the structure.
    Type: Application
    Filed: February 8, 2022
    Publication date: May 26, 2022
    Inventors: Charles R. Lottes, Shawn George Thomas, Henry Frank Erk
  • Patent number: 11282739
    Abstract: Methods for removing an oxide film from a silicon-on-insulator structure are disclosed. The oxide may be stripped from a SOI structure before deposition of an epitaxial silicon thickening layer. The oxide film may be removed by dispensing an etching solution toward a center region of the SOI structure and dispensing an etching solution to an edge region of the structure.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: March 22, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Charles R. Lottes, Shawn George Thomas, Henry Frank Erk
  • Publication number: 20210183692
    Abstract: Methods for removing an oxide film from a silicon-on-insulator structure are disclosed. The oxide may be stripped from a SOI structure before deposition of an epitaxial silicon thickening layer. The oxide film may be removed by dispensing an etching solution toward a center region of the SOI structure and dispensing an etching solution to an edge region of the structure.
    Type: Application
    Filed: October 30, 2020
    Publication date: June 17, 2021
    Inventors: Charles R. Lottes, Shawn George Thomas, Henry Frank Erk
  • Patent number: 10796946
    Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: October 6, 2020
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Henry Frank Erk, Sasha Kweskin, Jeffrey L. Libbert, Mayank Bulsara
  • Publication number: 20200035544
    Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.
    Type: Application
    Filed: October 7, 2019
    Publication date: January 30, 2020
    Inventors: Henry Frank Erk, Sasha Kweskin, Jeffrey L. Libbert, Mayank Bulsara
  • Patent number: 10475696
    Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: November 12, 2019
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Henry Frank Erk, Sasha Kweskin, Jeffrey L. Libbert, Mayank Bulsara
  • Publication number: 20190203378
    Abstract: Methods for removing a melt of silicon from a crucible used in a silicon ingot growth process and associated wick assemblies are disclosed. The wick is made of porous carbon that ignites upon reaching an ignition temperature causing relatively rapid and relatively large volume take-up of silicon from the crucible.
    Type: Application
    Filed: December 18, 2018
    Publication date: July 4, 2019
    Inventors: Bayard K. Johnson, Henry Frank Erk, Steven Lee Garner, John Gibbons, Anthony Thomas Berhorst, Joseph C. Holzer, Benjamin Michael Meyer, Parthiv Daggolu, Arash Mehdizadeh Dehkordi, Shawn Wesley Hayes
  • Publication number: 20190164811
    Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a step of high pressure bonding.
    Type: Application
    Filed: March 3, 2017
    Publication date: May 30, 2019
    Inventors: Sasha Joseph Kweskin, Henry Frank Erk
  • Publication number: 20190019721
    Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.
    Type: Application
    Filed: June 6, 2018
    Publication date: January 17, 2019
    Inventors: Henry Frank Erk, Sasha Kweskin, Jeffrey L. Libbert, Mayank Bulsara
  • Publication number: 20140144846
    Abstract: A process is provided for treating coolant fluid used in wire-saw cutting of semiconductor wafers and which contains silicon-containing impurities. The process comprises changing the properties of the used coolant fluid so that the silicon-containing impurities may be filtered and separated from the coolant fluid to thereby yield a coolant fluid filtrate suitable for use in a wire-saw cutting operation.
    Type: Application
    Filed: November 26, 2012
    Publication date: May 29, 2014
    Applicant: MEMC SINGAPORE, PTE. LTD (UEN200614797D)
    Inventors: Alexis Grabbe, Sasha Joseph Kweskin, Larry Wayne Shive, Henry Frank Erk
  • Patent number: 7559825
    Abstract: Semiconductor wafers have a front surface, a back surface, a notch, and an edge. A method of polishing a wafer includes polishing at least one of the surfaces and the notch of the wafer using a polishing pad and slurry. At least one surface of the wafer is cleaned of residual slurry. The cleaned surface is grasped by applying a vacuum to the cleaned surface of the wafer using a vacuum chuck. Edge of the wafer is polished using a pad and slurry while the wafer is grasped by the vacuum chuck.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: July 14, 2009
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Henry Frank Erk, Judith Ann Schmit, Roland Vandamme
  • Publication number: 20080153391
    Abstract: Semiconductor wafers have a front surface, a back surface, a notch, and an edge. A method of polishing a wafer includes polishing at least one of the surfaces and the notch of the wafer using a polishing pad and slurry. At least one surface of the wafer is cleaned of residual slurry. The cleaned surface is grasped by applying a vacuum to the cleaned surface of the wafer using a vacuum chuck. Edge of the wafer is polished using a pad and slurry while the wafer is grasped by the vacuum chuck.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Henry Frank Erk, Judith Ann Schmit, Roland Vandamme
  • Publication number: 20040038544
    Abstract: A method for polishing front and back surfaces of a semiconductor wafer includes the step of providing a polishing apparatus having a wafer carrier generally disposed between a first polishing pad and a second polishing pad. The first pad has a hardness significantly greater than a hardness of the second pad. The wafer is placed in the wafer carrier so that the front surface faces the first pad and so that the back surface faces the second pad. A polishing slurry is applied to at least one of the pads and the carrier, first pad and second pad are rotated. The front surface is brought into contact with the first pad and the back surface is brought into contact with the second pad for polishing the front and back surfaces of the wafer whereby less wafer material is removed from the back surface engaged by the second pad and the back surface has less gloss than the front surface after polishing so that the front surface and back surface are visually distinguishable.
    Type: Application
    Filed: April 22, 2003
    Publication date: February 26, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Guoqiang (David) Zhang, Henry Frank Erk, Tracy M. Ragan, Julie A. Kearns