Abstract: A method for simulating a circuit represented by a top circuit and a plurality of subcircuit instances (SCIs) forming a hierarchy under the top circuit. The method comprises, during an iteration round of one or more iteration rounds, obtaining respective circuit equation parameters for each respective SCI of the plurality of SCIs in a bottom-up process, in which at least some of the circuit equation parameters for a parent SCI are obtained using a portion of the circuit equation parameters for a child SCI of the parent SCI. The method further comprises determining respective signal values of each respective SCI of the plurality of SCIs in a top-down process, where, for each child SCI having internal nets, signal values at internal nets of the child SCI are obtained using one or more signal values determined for a parent SCI and corresponding to one or more signal values at external ports of the child SCI.

Abstract: A method for simulating a circuit represented by a top circuit and a plurality of subcircuit instances (SCIs) forming a hierarchy under the top circuit. The method comprises, during an iteration round of one or more iteration rounds, obtaining respective circuit equation parameters for each respective SCI of the plurality of SCIs in a bottom-up process, in which at least some of the circuit equation parameters for a parent SCI are obtained using a portion of the circuit equation parameters for a child SCI of the parent SCI. The method further comprises determining respective signal values of each respective SCI of the plurality of SCIs in a top-down process, where, for each child SCI having internal nets, signal values at internal nets of the child SCI are obtained using one or more signal values determined for a parent SCI and corresponding to one or more signal values at external ports of the child SCI.

Abstract: A method for simulating a hierarchical circuit includes a bottom-up process and a top-down process in each of a series of iteration rounds. The bottom-up process starts from a bottom level of the hierarchical circuit and obtains submatrices and subvectors for each subcircuit instance (SCI) in the hierarchical circuit. For each SCI, after obtaining first and second submatrices and first and second subvectors of the each SCI, the second submatrix and the second subvector are passed up to the next level in the hierarchy and used to calculate the circuit equation for a parent SCI in the next level. In the top-down process, starting at a top circuit, signal values in each level of the hierarchical circuit are determined. Certain signal values of a parent SCI are passed down to each child SCI, and are used to determine the internal signal values of the child SCI together with the first submatrix and the first subvector of the child SCI.

Abstract: A method for simulating a hierarchical circuit includes a bottom-up process and a top-down process in each of a series of iteration rounds. The bottom-up process starts from a bottom level of the hierarchical circuit and obtains submatrices and subvectors for each subcircuit instance (SCI) in the hierarchical circuit. For each SCI, after obtaining first and second submatrices and first and second subvectors of the each SCI, the second submatrix and the second subvector are passed up to the next level in the hierarchy and used to calculate the circuit equation for a parent SCI in the next level. In the top-down process, starting at a top circuit, signal values in each level of the hierarchical circuit are determined. Certain signal values of a parent SCI are passed down to each child SCI, and are used to determine the internal signal values of the child SCI together with the first submatrix and the first subvector of the child SCI.