Abstract: Disclosed herein are semiconductor devices to provide a CMOS-compatible, wafer-scale, multi-well platform that can be used for biomedical or other applications, and methods to operate the same. In some embodiments, circuitry is provided underneath a multiple-well array to electrically interface with electrodes in the wells. To interface with electrodes in a large array, circuitry may be fabricated on a single silicon (Si) wafer having a dimension that is at least the same or larger than that of the multiple-well array. According to one aspect of the present disclosure, standard CMOS fabrication process such as those known to be used in a standard semiconductor foundry may be used without expensive customization for complex fabrication procedures. This may help the production cost to be lowered in some cases.

Abstract: A nonvolatile memory device includes a resistance switching layer, a gate on the resistance switching layer, a gate oxide layer between the resistance switching layer and the gate, and a source and a drain, spaced apart from each other, on the resistance switching layer. A resistance value of the resistance switching layer is changed based on an illumination of light irradiated onto the resistance switching layer and is maintained as a changed resistance value.

Abstract: A nonvolatile memory device includes a resistance switching layer, a gate on the resistance switching layer, a gate oxide layer between the resistance switching layer and the gate, and a source and a drain, spaced apart from each other, on the resistance switching layer. A resistance value of the resistance switching layer is changed based on an illumination of light irradiated onto the resistance switching layer and is maintained as a changed resistance value.

Abstract: Disclosed is a neural computer including an image sensor capable of controlling a photocurrent. The neural computer according to an embodiment includes a preprocessor configured to receive an image and generate a feature map for the received image; a flattening unit configured to transform the feature map generated by the preprocessor into tabular data to provide data output; and an image classifier configured to classify images received through the preprocessor by using the data output by the flattening unit as an input value. The preprocessor includes an optical signal processor configured to receive the image and generate the feature map.