Patents by Inventor Henry K. Hong

Henry K. Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8957513
    Abstract: A semiconductor device comprising: a lower semiconductor package that comprises a first set of one or more semiconductor dies, an upper semiconductor package that is stacked on the lower semiconductor package, the upper semiconductor package comprises a second set of one or more semiconductor dies, and a first interconnect pad that is embedded in a top side of the lower semiconductor package to couple the upper semiconductor package to the lower semiconductor package.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: February 17, 2015
    Assignee: Intel Corporation
    Inventors: Ke Xiao, Henry K. Hong, Gunaranjan Viswanathan
  • Publication number: 20140027907
    Abstract: A semiconductor device comprising: a lower semiconductor package that comprises a first set of one or more semiconductor dies, an upper semiconductor package that is stacked on the lower semiconductor package, the upper semiconductor package comprises a second set of one or more semiconductor dies, and a first interconnect pad that is embedded in a top side of the lower semiconductor package to couple the upper semiconductor package to the lower semiconductor package.
    Type: Application
    Filed: September 26, 2013
    Publication date: January 30, 2014
    Inventors: Ke XIAO, Henry K. HONG, Gunaranjan VISWANATHAN
  • Patent number: 8580609
    Abstract: A semiconductor device comprising: a lower semiconductor package that comprises a first set of one or more semiconductor dies, an upper semiconductor package that is stacked on the lower semiconductor package, the upper semiconductor package comprises a second set of one or more semiconductor dies, and a first interconnect pad that is embedded in a top side of the lower semiconductor package to couple the upper semiconductor package to the lower semiconductor package.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: November 12, 2013
    Assignee: Intel Corporation
    Inventors: Ke Xiao, Henry K. Hong, Gunaranjan Viswanathan
  • Publication number: 20100327420
    Abstract: A semiconductor device comprising: a lower semiconductor package that comprises a first set of one or more semiconductor dies, an upper semiconductor package that is stacked on the lower semiconductor package, the upper semiconductor package comprises a second set of one or more semiconductor dies, and a first interconnect pad that is embedded in a top side of the lower semiconductor package to couple the upper semiconductor package to the lower semiconductor package.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventors: Ke Xiao, Henry K. Hong, Gunaranjan Viswanathan