Abstract: Systems, methods, and devices for isolating a misbehaving accelerator circuit, such as an accelerator function unit or an accelerated function context, are provided. An integrated circuit may include a region that includes an accelerator circuit. When the accelerator circuit issues a request, another region of the integrated circuit or a processor connected to the integrated circuit may determine whether there is a misbehavior associated with the request and, in response to determining that there is a misbehavior associated with the request, may perform a misbehavior response to mitigate a negative impact of the misbehavior of the accelerator circuit.

Abstract: A system comprising an accelerator circuit comprising an accelerator function unit to implement a first function, and one or more device feature header (DFH) circuits to provide attributes associated with the accelerator function unit, and a processor to retrieve the attributes of the accelerator function unit by traversing a device feature list (DFL) referencing the one or more DFH circuits, execute, based on the attributes, an application encoding the first function to cause the accelerator function unit to perform the first function.

Abstract: A system comprising an accelerator circuit comprising an accelerator function unit to implement a first function, and one or more device feature header (DFH) circuits to provide attributes associated with the accelerator function unit, and a processor to retrieve the attributes of the accelerator function unit by traversing a device feature list (DFL) referencing the one or more DFH circuits, execute, based on the attributes, an application encoding the first function to cause the accelerator function unit to perform the first function.

Abstract: Systems, methods, and devices for isolating a misbehaving accelerator circuit, such as an accelerator function unit or an accelerated function context, are provided. An integrated circuit may include a region that includes an accelerator circuit. When the accelerator circuit issues a request, another region of the integrated circuit or a processor connected to the integrated circuit may determine whether there is a misbehavior associated with the request and, in response to determining that there is a misbehavior associated with the request, may perform a misbehavior response to mitigate a negative impact of the misbehavior of the accelerator circuit.

Abstract: Systems, methods, and devices for isolating a misbehaving accelerator circuit, such as an accelerator function unit or an accelerated function context, are provided. An integrated circuit may include a region that includes an accelerator circuit. When the accelerator circuit issues a request, another region of the integrated circuit or a processor connected to the integrated circuit may determine whether there is a misbehavior associated with the request and, in response to determining that there is a misbehavior associated with the request, may perform a misbehavior response to mitigate a negative impact of the misbehavior of the accelerator circuit.

Abstract: A system comprising an accelerator circuit comprising an accelerator function unit to implement a first function, and one or more device feature header (DFH) circuits to provide attributes associated with the accelerator function unit, and a processor to retrieve the attributes of the accelerator function unit by traversing a device feature list (DFL) referencing the one or more DFH circuits, execute, based on the attributes, an application encoding the first function to cause the accelerator function unit to perform the first function.

Abstract: Systems, methods, and devices for isolating a misbehaving accelerator circuit, such as an accelerator function unit or an accelerated function context, are provided. An integrated circuit may include a region that includes an accelerator circuit. When the accelerator circuit issues a request, another region of the integrated circuit or a processor connected to the integrated circuit may determine whether there is a misbehavior associated with the request and, in response to determining that there is a misbehavior associated with the request, may perform a misbehavior response to mitigate a negative impact of the misbehavior of the accelerator circuit.

Abstract: An embodiment of a device manager apparatus may include a request processor to process a request for a reconfiguration of a reconfigurable device, a configuration controller communicatively coupled to the request processor to reconfigure the reconfigurable device based on the request, and a pseudo-device manager communicatively coupled to the request processor to create a pseudo device based on the request which corresponds to a functionality of the reconfiguration.

Abstract: A method for inverse multiplexing of managed traffic flows over a multi-star switch network includes a source node classifier. The source node classifier, using a traffic-engineering algorithm, classifies incoming traffic based on flow parameters, embeds the flow parameters in a routing table in a node for a flow, places packets from classified flows into Switch-Specific Managed-Traffic Queues (SSMT) and a source node unmanaged traffic queue. A source node switch input scheduler process for a switch selects all managed packets from the SSMT destined for the switch, then selects a single unmanaged packet from the source node unmanaged traffic queue. The source node transmits the packets as classified flows through a switch fabric to the destination node. At the destination node packets transmitted through the switch fabric are sorted by a Switch Output Process and sent to intended output queues.

Abstract: Multiple voice channels are aggregated into a packet having a segmented data structure and sent over a packet network. The segmented data structure includes segment IDs, corresponding data segments and a packet header arranged so that all data is aligned on 8-byte boundaries for efficient processing by 64-bit processors. The data segment represents one or more milliseconds of digitized voice data, and the segment ID explicitly identifies the voice channel associated with the digitized voice data without reference to any other data in the data structure.

Abstract: A method for inverse multiplexing of unmanaged traffic flows over a multi-star switch network, where the ingress process for each switch handles managed traffic for its switch first, then pulls a single unmanaged traffic packet off of the unmanaged traffic queue, and processes and transmits the packet. At the destination node unmanaged traffic packets received from the fabric output are acted upon by the Sequence-Checking Process to determine if the packet is in sequence. If the received packet is in sequence, the Sequence-Checking Process sends it on to the output queue. If the received packet is not in sequence, the packet is placed in a buffer. The Sequence Checking Process then checks the fabric output and the buffer by scanning for the next in-sequence packet.

Abstract: A method for inverse multiplexing of unmanaged traffic flows over a multi-star switch network, where the ingress process for each switch handles managed traffic for its switch first, then pulls a single unmanaged traffic packet off of the unmanaged traffic queue, and processes and transmits the packet. At the destination node unmanaged traffic packets received from the fabric output are acted upon by the Sequence-Checking Process to determine if the packet is in sequence. If the received packet is in sequence, the Sequence-Checking Process sends it on to the output queue. If the received packet is not in sequence, the packet is placed in a buffer. The Sequence Checking Process then checks the fabric output and the buffer by scanning for the next in-sequence packet.

Abstract: A method for inverse multiplexing of managed traffic flows over a multi-star switch network includes a source node classifier. The source node classifier, using a traffic-engineering algorithm, classifies incoming traffic based on flow parameters, embeds the flow parameters in a routing table in a node for a flow, places packets from classified flows into Switch-Specific Managed-Traffic Queues (SSMT) and a source node unmanaged traffic queue. A source node switch input scheduler process for a switch selects all managed packets from the SSMT destined for the switch, then selects a single unmanaged packet from the source node unmanaged traffic queue. The source node transmits the packets as classified flows through a switch fabric to the destination node. At the destination node packets transmitted through the switch fabric are sorted by a Switch Output Process and sent to intended output queues.

Abstract: Multiple voice channels are aggregated into a packet having a segmented data structure and sent over a packet network. The segmented data structure includes segment IDs, corresponding data segments and a packet header arranged so that all data is aligned on 8-byte boundaries for efficient processing by 64-bit processors. The data segment represents one or more milliseconds of digitized voice data, and the segment ID explicitly identifies the voice channel associated with the digitized voice data without reference to any other data in the data structure.