Patents by Inventor Henry Y. Pun

Henry Y. Pun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6194911
    Abstract: In an integrated circuit tester module, pin electronics circuitry supplies leakage current to a circuit node which is connected to a signal pin of a device under test. The leakage current is compensated by connecting the circuit node to a voltage source at a first potential level, supplying current to the circuit node from a second potential level, and measuring current supplied to the circuit node from the voltage source. The second potential level is selectively varied in a manner such as to reduce the current supplied from the voltage source substantially to zero. The circuit node is then disconnected from the voltage source.
    Type: Grant
    Filed: May 11, 1999
    Date of Patent: February 27, 2001
    Assignee: Credence Systems Corporation
    Inventors: Jeffrey D. Currin, Henry Y. Pun
  • Patent number: 5999008
    Abstract: In an integrated circuit tester module, pin electronics circuitry supplies leakage current to a circuit node which is connected to a signal pin of a device under test. The leakage current is compensated by connecting the circuit node to a voltage source at a first potential level, supplying current to the circuit node from a second potential level, and measuring current supplied to the circuit node from the voltage source. The second potential level is selectively varied in a manner such as to reduce the current supplied from the voltage source substantially to zero. The circuit node is then disconnected from the voltage source.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: December 7, 1999
    Assignee: Credence Systems Corporation
    Inventors: Jeffrey D. Currin, Henry Y. Pun
  • Patent number: 5930735
    Abstract: An integrated circuit tester includes a quasi-autonomous test instrument for performing an acquisition task. The test instrument includes a state machine, a command stack for storing commands which specify parameters of the acquisition task, an acquisition device having at least one terminal for connection to a pin of the DUT for acquiring a value of a variable from the DUT in accordance with the defined parameters of the acquisition task, and an acquisition memory for temporarily storing acquired values and making the acquired values available after the test. The state machine is responsive to an externally supplied trigger to initiate performance of the acquisition task under control of a clock signal by reading a command from the command stack and to perform the acquisition task in accordance with the parameters specified in the command.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: July 27, 1999
    Assignee: Credence Systems Corporation
    Inventor: Henry Y. Pun