Patents by Inventor Henry Yao
Henry Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230110143Abstract: A system and a method are provided for displaying message history while composing a message. The method includes displaying a message composition application comprising a first recipient field, a message history display area, and a message composition field; detecting an input into the first recipient field for specifying a recipient; and upon detecting that the recipient has been specified: displaying a second recipient field; navigating application focus from the first recipient field to the second recipient field; and displaying a message history associated with the recipient in the message history display area.Type: ApplicationFiled: October 10, 2022Publication date: April 13, 2023Inventors: Leonid Vymenets, Francis Thomas Riddle, Henry Yao-Tsu CHEN
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Publication number: 20220353216Abstract: Example methods and apparatus for enabling voice communications via a messaging application are described. One example method includes providing a conversation user interface in the messaging application, where the conversation user interface includes communication records between a contact and a user. Voice information of the user is received after the user triggers a record button, where the record button appears in the conversation user interface. A voice note related to the voice information is presented in the form of the communication records on the conversation user interface. The voice note is played in response to selecting the voice note by the user. The voice note is paused from playing in response to a first instruction from the user to pause playing the voice note, and is resumed playing in response to a second instruction from the user to resume playing the voice note.Type: ApplicationFiled: March 24, 2022Publication date: November 3, 2022Inventors: Henry Yao-Tsu CHEN, Jennifer Anne PRETTI
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Patent number: 11290399Abstract: A method and system are provided for enabling voice communications via a messaging application. The method comprises enabling an instant messaging (IM) presence status option to be selected; and blocking an incoming voice communication when the presence status option has been selected. A method and system are also provided comprising displaying a first instant message in an instant messaging conversation user interface comprising call status information; and displaying updated call status information in the instant messaging conversation user interface after determining whether an call attempt has been successful.Type: GrantFiled: September 17, 2019Date of Patent: March 29, 2022Assignee: Huawei Technologies Co., Ltd.Inventors: Henry Yao-Tsu Chen, Jennifer Anne Pretti
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Publication number: 20220006762Abstract: A method and system are provided for enabling voice communications via a messaging application. The method comprises enabling an instant messaging (IM) presence status option to be selected; and blocking an incoming voice communication when the presence status option has been selected. A method and system are also provided comprising displaying a first instant message in an instant messaging conversation user interface comprising call status information; and displaying updated call status information in the instant messaging conversation user interface after determining whether an call attempt has been successful.Type: ApplicationFiled: July 14, 2021Publication date: January 6, 2022Inventors: Henry Yao-Tsu CHEN, Jennifer Anne PRETTI
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Publication number: 20200396188Abstract: A method and system are provided for enabling voice communications via a messaging application. The method comprises enabling an instant messaging (IM) presence status option to be selected; and blocking an incoming voice communication when the presence status option has been selected. A method and system are also provided comprising displaying a first instant message in an instant messaging conversation user interface comprising call status information; and displaying updated call status information in the instant messaging conversation user interface after determining whether an call attempt has been successful.Type: ApplicationFiled: September 17, 2019Publication date: December 17, 2020Inventors: Henry Yao-Tsu CHEN, Jennifer Anne PRETTI
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Patent number: 10691074Abstract: A time-to-digital converter circuit includes a logic gate coupled to receive a first trigger signal indicative of a first clock signal and a second trigger signal indicative of a second clock signal. The logic gate is to generate a logic gate output signal responsive to the earlier of the first or second trigger signals to be a logic high. A synchronization circuit is included and is coupled to the logic gate and is configured to synchronize the logic gate output signal to a third clock to produce a synchronization output signal. A counter circuit counts pulses of the synchronization output signal.Type: GrantFiled: May 6, 2019Date of Patent: June 23, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Henry Yao, Sinjeet Dhanvantray Parekh
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Patent number: 10643394Abstract: In a device including a processor and a memory in communication with the processor is described, the memory includes executable instructions that, when executed by the processor, cause the processor to control the device to perform functions of: generating, based on a plurality of local 3D models, a global 3D model representing a portion of a real-world environment; determining a location of a 3D virtual object in the global 3D model; and generating augmentation data for rendering the 3D virtual object to be seen at a location of the real-world environment corresponding to the location of the 3D virtual object in the global 3D model.Type: GrantFiled: December 16, 2018Date of Patent: May 5, 2020Assignee: Microsoft Technology Licensing, LLCInventors: Henry Yao-Tsu Chen, Brandon V. Taylor, Mark Robert Swift, Austin S. Lee, Ryan S. Menezes
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Patent number: 10516401Abstract: A circuit includes a time-to-digital converter (TDC) to produce an output signal that is a function of a time difference between a first input clock to the TDC and a second input clock to the TDC. A first delay line is also included to add a time delay to a third clock to produce the first input clock. A pseudo random binary sequence generator generates a pseudo random binary bit sequence to be used to vary the amount of time delay added by the first delay line to the third clock.Type: GrantFiled: December 10, 2018Date of Patent: December 24, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jayawardan Janardhanan, Eric Paul Lindgren, Henry Yao
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Patent number: 10505554Abstract: A phase-locked loop circuit includes a first time-to-digital converter (TDC) to receive an input reference signal, a digital-controlled oscillator (DCO), and a first divider coupled to an output of the DCO. The first divider divides down a frequency of an output from the DCO. A second divider divides down a frequency of an output form the first divider to provide a second divider output to an input of the first TDC. The first TDC generates an output digital value encoding a time difference between corresponding edges of the input reference signal and the second divider output. A second TDC receives the input reference signal. An averager circuit generates a digital output that is indicative of an average of an output from the second TDC. A subtractor circuit subtracts the digital output from the average and the output digital value from the first TDC.Type: GrantFiled: August 10, 2018Date of Patent: December 10, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Jayawardan Janardhanan, Christopher Andrew Schell, Henry Yao, Raghu Ganesan
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Patent number: 10496041Abstract: A time-to-digital converter circuit includes a logic gate coupled to receive a first trigger signal indicative of a first clock signal and a second trigger signal indicative of a second clock signal. The logic gate is to generate a logic gate output signal responsive to the earlier of the first or second trigger signals to be a logic high. A synchronization circuit is included and is coupled to the logic gate and is configured to synchronize the logic gate output signal to a third clock to produce a synchronization output signal. A counter circuit counts pulses of the synchronization output signal.Type: GrantFiled: May 29, 2018Date of Patent: December 3, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Henry Yao, Sinjeet Dhanvantray Parekh
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Publication number: 20190348989Abstract: A phase-locked loop circuit includes a first time-to-digital converter (TDC) to receive an input reference signal, a digital-controlled oscillator (DCO), and a first divider coupled to an output of the DCO. The first divider divides down a frequency of an output from the DCO. A second divider divides down a frequency of an output form the first divider to provide a second divider output to an input of the first TDC. The first TDC generates an output digital value encoding a time difference between corresponding edges of the input reference signal and the second divider output. A second TDC receives the input reference signal. An averager circuit generates a digital output that is indicative of an average of an output from the second TDC. A subtractor circuit subtracts the digital output from the average and the output digital value from the first TDC.Type: ApplicationFiled: August 10, 2018Publication date: November 14, 2019Inventors: Jayawardan JANARDHANAN, Christopher Andrew SCHELL, Henry YAO, Raghu GANESAN
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Publication number: 20190339651Abstract: A time-to-digital converter circuit includes a logic gate coupled to receive a first trigger signal indicative of a first clock signal and a second trigger signal indicative of a second clock signal. The logic gate is to generate a logic gate output signal responsive to the earlier of the first or second trigger signals to be a logic high. A synchronization circuit is included and is coupled to the logic gate and is configured to synchronize the logic gate output signal to a third clock to produce a synchronization output signal. A counter circuit counts pulses of the synchronization output signal.Type: ApplicationFiled: May 6, 2019Publication date: November 7, 2019Inventors: Henry YAO, Sinjeet Dhanvantray PAREKH
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Publication number: 20190339650Abstract: A time-to-digital converter circuit includes a logic gate coupled to receive a first trigger signal indicative of a first clock signal and a second trigger signal indicative of a second clock signal. The logic gate is to generate a logic gate output signal responsive to the earlier of the first or second trigger signals to be a logic high. A synchronization circuit is included and is coupled to the logic gate and is configured to synchronize the logic gate output signal to a third clock to produce a synchronization output signal. A counter circuit counts pulses of the synchronization output signal.Type: ApplicationFiled: May 29, 2018Publication date: November 7, 2019Inventors: Henry YAO, Sinjeet Dhanvantray PAREKH
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Publication number: 20190288695Abstract: A phase-locked loop (PLL) system includes a first PLL coupled to receive a first reference clock. The PLL system also includes a second PLL coupled to receive a second reference clock. The output of the second PLL is coupled to the first PLL, and the second PLL is configured to control the first PLL. The PLL system further includes a third PLL coupled to receive an input reference clock. The output of the third PLL is coupled to the second PLL. The third PLL is configured to control the second PLL.Type: ApplicationFiled: December 27, 2018Publication date: September 19, 2019Inventors: Henry YAO, Arvind SRIDHAR, Sinjeet Dhanvantray PAREKH, Jayawardan JANARDHANAN
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Publication number: 20190280649Abstract: A circuit includes a time-to-digital converter (TDC) to produce an output signal that is a function of a time difference between a first input clock to the TDC and a second input clock to the TDC. A first delay line is also included to add a time delay to a third clock to produce the first input clock. A pseudo random binary sequence generator generates a pseudo random binary bit sequence to be used to vary the amount of time delay added by the first delay line to the third clock.Type: ApplicationFiled: December 10, 2018Publication date: September 12, 2019Inventors: Jayawardan JANARDHANAN, Eric Paul LINDGREN, Henry YAO
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Publication number: 20190122442Abstract: In a device including a processor and a memory in communication with the processor is described, the memory includes executable instructions that, when executed by the processor, cause the processor to control the device to perform functions of: generating, based on a plurality of local 3D models, a global 3D model representing a portion of a real-world environment; determining a location of a 3D virtual object in the global 3D model; and generating augmentation data for rendering the 3D virtual object to be seen at a location of the real-world environment corresponding to the location of the 3D virtual object in the global 3D model.Type: ApplicationFiled: December 16, 2018Publication date: April 25, 2019Applicant: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Henry Yao-Tsu Chen, Brandon V. Taylor, Mark Robert Swift, Austin S. Lee, Ryan S. Menezes
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Patent number: 10235808Abstract: A user device comprises a network interface, a rendering module, and a scene modification module. The network interface is configured to receive a video signal from another device via a network. The rendering module is configured to control display apparatus of the user device to display a virtual element to a user of the user device, the virtual element comprising a video image derived from the video signal. The modification module is configured to generate rendering data for displaying a modified version of the virtual element at the other device. The modified version does not include said video image. The network interface is configured to transmit the rendering data to the other device via the network. Alternatively or in addition, the rendering data can be modified at the other device to the same end.Type: GrantFiled: April 26, 2016Date of Patent: March 19, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Henry Yao-Tsu Chen, Brandon V. Taylor, Mark Robert Swift, Austin S. Lee, Ryan S. Menezes, Jason Thomas Faulkner
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Patent number: 10222927Abstract: In one example, a magnification display system may alert a user to event notifications that are presented outside the magnification area. The magnification display system may apply a magnification area with a magnification module to a section of a viewing area presented by a display. The magnification display system may receive an event notification outside the magnification area. The magnification display system may introduce a notification indication alerting a user to the event notification.Type: GrantFiled: October 24, 2014Date of Patent: March 5, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Adam Smolinski, Henry Yao-Tsu Chen
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Patent number: 10169917Abstract: An augmented reality (AR) system receives a plurality of local 3D models of a part of a real-world environment, each having been generated by a different AR device when located in the real-world environment. The local 3D models are combined to generate a global 3D model, at least part of which is transmitted to a device remote from the real-world environment. The global 3D model represents a greater portion of the real-environment than any of the local 3D models individually. The AR system receives rendering data from the remote device, and transmits it to an AR device when the AR device is located in the real-world environment. Alternatively, the rendering data may be transmitted from the remote device to the AR device via a network directly. The rendering data is for use in rendering a virtual object at the AR device in the real-world environment.Type: GrantFiled: April 26, 2016Date of Patent: January 1, 2019Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Henry Yao-Tsu Chen, Brandon V. Taylor, Mark Robert Swift, Austin S. Lee, Ryan S. Menezes
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Patent number: 10120550Abstract: A shutter and shutter operator are displayed adjacent to a boundary of an information display region on a display of a portable electronic device. The information display region displays first information. In a first state, the shutter operator indicates a first direction of movement of the shutter away from the boundary for the display of second information. In response to an input, the second information is displayed, and the shutter operator changes to indicate another direction of movement of the shutter towards the boundary for hiding the second information.Type: GrantFiled: March 3, 2016Date of Patent: November 6, 2018Assignee: BlackBerry LimitedInventors: Margaret Elizabeth Kuo, Thomas Jan Stovicek, Yoojin Hong, Michael George Langlois, Henry Yao-Tsu Chen