Patents by Inventor Heon Yong Chang

Heon Yong Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080280440
    Abstract: Disclosed is a method of forming a PN diode and a method of manufacturing a phase change memory device using the same. Formation of a PN diode includes forming a first conductivity type region in a surface of a semiconductor substrate. A polysilicon layer doped with second conductivity type impurities is then deposited on the semiconductor substrate formed with the first conductivity type region. Forming a plurality of second conductivity type regions by etching the polysilicon layer doped with the second conductivity type impurities completes the PN diode. Since the P-regions of a PN diode are formed through the deposition and etching of a polysilicon layer doped with second conductivity type impurities rather than an SEG process, a uniformity of resistance in the PN diode can be obtained.
    Type: Application
    Filed: November 12, 2007
    Publication date: November 13, 2008
    Inventor: Heon Yong CHANG
  • Publication number: 20080280411
    Abstract: A phase change memory device is made by processes including forming a first interlayer dielectric on a semiconductor substrate that has junction regions. Then etching the first interlayer dielectric and thereby defining contact holes that expose the junction regions. A conductive layer is formed on the first interlayer dielectric to fill the contact holes. Forming a hard mask layer on the conductive layer and etching the hard mask layer and the conductive layer to form contact plugs in the contact holes. Finally, forming a conductive layer pattern that is located on the contact plug and portions of the first interlayer dielectric adjacent to the contact plug and having a hard mask thereon.
    Type: Application
    Filed: October 12, 2007
    Publication date: November 13, 2008
    Inventor: Heon Yong CHANG
  • Publication number: 20080268569
    Abstract: Disclosed are a phase-change memory device and its manufacturing method, which can reduce a contact area between a bottom electrode and a phase-change layer, thereby reducing the quantity of current necessary for phase change. The phase-change memory device comprises: a bottom electrode formed on a contact plug; a phase-change layer formed on the bottom electrode and having a shape of a character ‘?’; and a top electrode formed on the phase-change layer.
    Type: Application
    Filed: June 30, 2008
    Publication date: October 30, 2008
    Inventor: Heon Yong Chang
  • Publication number: 20080237565
    Abstract: A phase change memory device for preventing thermal cross-talk includes lower electrodes respectively formed in a plurality of phase change cell regions of a semiconductor substrate. A first insulation layer is formed on the semiconductor substrate including the lower electrodes having holes for exposing the respective lower electrodes. Heaters are formed on the surfaces of the respective holes to contact the lower electrodes. A second insulation layer is formed to fill the holes in which the heaters are formed. A mask pattern is then formed on the first and second insulation layers, including the heaters, to have openings that expose portions of the respective heaters having a constant pitch. A phase change layer is formed on the mask pattern including the exposed portions of the heaters and the first and second insulation layers and subsequently, upper electrodes are formed on the phase change layer.
    Type: Application
    Filed: October 12, 2007
    Publication date: October 2, 2008
    Inventor: Heon Yong CHANG
  • Patent number: 7408181
    Abstract: Disclosed are a phase-change memory device and its manufacturing method, which can reduce a contact area between a bottom electrode and a phase-change layer, thereby reducing the quantity of current necessary for phase change. The phase-change memory device comprises: a bottom electrode formed on a contact plug; a phase-change layer formed on the bottom electrode and having a shape of a character ‘?’; and a top electrode formed on the phase-change layer.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: August 5, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventor: Heon Yong Chang
  • Publication number: 20080157054
    Abstract: A phase change memory device includes a semiconductor substrate having active regions and an isolation structure; gate lines extending in a direction perpendicular to the active regions; a source region and a drain region formed in a surface of each active region; a dot type lower electrode including a first contact plug formed in the drain region; second contact plugs formed in the source region and the isolation structure forming a line parallel to the gate line; a lower electrode contact formed on the lower electrode; a phase change layer and an upper electrode formed on the lower electrode contact; an upper electrode contact formed on the upper electrode; contacts for ground lines, formed between the active regions to come into contact with the second contact plugs; a bit line formed in the active region; and ground lines formed between the active regions.
    Type: Application
    Filed: September 14, 2007
    Publication date: July 3, 2008
    Inventor: Heon Yong CHANG
  • Publication number: 20080128673
    Abstract: A transistor for a phase change memory device includes a semiconductor substrate in which active regions are delimited by an isolation structure. A groove is defined on a surface of a gate forming area of each active region. Portions of the isolation structure, which are adjacent to the gate forming area of the active region, are recessed to expose side faces of the gate forming area of the active region. A gate is formed on the gate forming area of the active region over the gate forming area grooves and exposed side faces thereof as well as the recessed portions of the isolation structure. Junction areas are then formed in the active region on both sides of the gate to complete the transistor of a phase change memory device.
    Type: Application
    Filed: September 14, 2007
    Publication date: June 5, 2008
    Inventors: Heon Yong CHANG, Suk Kyoung HONG, Hae Chan PARK, Nam Kyun PARK
  • Publication number: 20080131994
    Abstract: A phase change memory device is manufactured by forming a sacrificial layer and a hard mask layer on a lower electrode; performing a first etching these layers and forming on the lower electrode a first stack pattern having a first width less than a width of the lower electrode; performing a second etching the first stack pattern and forming a second stack pattern having a second width less than the first width; forming an insulation to cover the second stack pattern; CMPing the insulation layer to expose the sacrificial layer; removing the sacrificial layer to define a contact hole; forming a lower electrode contact in the contact hole; and forming a phase change layer and an upper electrode on the insulation layer including the lower electrode contact. By manufacturing the phase change memory device in this manner, the size of the contact hole can be decreased and uniformly defined.
    Type: Application
    Filed: September 14, 2007
    Publication date: June 5, 2008
    Inventor: Heon Yong CHANG
  • Publication number: 20080117668
    Abstract: A phase change memory device having a uniform set and reset current includes a first and second sense amplifiers that are respectively placed adjacent to both ends of a plurality of active regions. The active regions include a first active region and a second active region. The first active region has a first area having a first width, a second area having a second width greater than the first width, and a third area having a third width greater than the second width and are sequentially arranged in a direction extending toward an area adjacent to the first sense amplifier. The second active region has a first area having a first width, a second area having a second width greater than the first width, and a third area having a third width greater than the second width, which are sequentially arranged in a direction extending toward an area adjacent to the second sense amplifier.
    Type: Application
    Filed: September 13, 2007
    Publication date: May 22, 2008
    Inventor: Heon Yong CHANG
  • Publication number: 20080116445
    Abstract: A phase change memory device includes a semiconductor substrate having a plurality of phase change cell regions; a lower electrode formed in each of the phase change cell regions on the semiconductor substrate; an insulation layer formed on the semiconductor substrate to cover the lower electrode and defined with a contact hole which exposes the lower electrode; a heater formed in the contact hole; a conductive pattern formed on the insulation layer to be spaced apart from the heater; a phase change layer formed on the heater, the conductive pattern, and portions of the insulation layer between the heater and the conductive pattern; and an upper electrode formed on the phase change layer. This phase change memory device allows the phase change layer to be stably formed and prevents the phase change layer from lifting.
    Type: Application
    Filed: September 14, 2007
    Publication date: May 22, 2008
    Inventor: Heon Yong CHANG
  • Publication number: 20080116443
    Abstract: A phase change memory device is manufactured by forming a first insulation layer on a semiconductor substrate having a plurality of phase change cell forming regions; defining a groove by etching the first insulation layer; forming a lower electrode in the groove; recessing the lower electrode; forming a second insulation layer on the recessed lower electrode to fill the groove; etching the second insulation layer and to define a hole for exposing the lower electrode; forming a lower electrode contact in the hole; and forming a phase change layer and an upper electrode on the lower electrode contact. By manufacturing the phase change memory device in this manner, the interface between the lower electrode contact and a phase change layer can be defined in a stable manner, resulting in the uniformity of a programming circuit.
    Type: Application
    Filed: September 13, 2007
    Publication date: May 22, 2008
    Inventors: Heon Yong CHANG, Suk Kyoung HONG
  • Publication number: 20080101112
    Abstract: A phase change memory device includes: a semiconductor substrate having active areas; a pair of word lines formed over the active areas and connected with each other at each end thereof; source areas formed in the respective active areas at both sides of the pair of word lines; drain areas formed in the respective active areas between the word lines of the pair of word lines connected with each other at each end thereof; ground lines and cell selection lines formed so as to make contact with the respective source areas respectively; lower electrodes formed so as to make contact with the drain areas; phase change layers and upper electrodes stacked over the respective lower electrodes; and bit lines formed over upper portion of the active areas so as to make contact to the upper electrodes.
    Type: Application
    Filed: July 16, 2007
    Publication date: May 1, 2008
    Inventor: Heon Yong CHANG
  • Publication number: 20080101111
    Abstract: Disclosed is a phase change memory device including: a semiconductor substrate having a plurality of bar-type active areas; a plurality of word lines arranged in a direction perpendicular to the active areas on the semiconductor substrate and in which a first pair of the word lines connected to each other at each first end thereof is arranged alternately with a second pair of the word lines connected to each other at each second end thereof opposite to the first end; source areas and drain areas formed in the active areas; common source areas, each connected to the source areas; a plurality of lower electrodes connected to the respective drain areas; phase change layers making contact with every two diagonally adjoining lower electrodes; upper electrodes formed on the phase change layers; and bit lines arranged in a direction of the active areas and be connected to the upper electrodes.
    Type: Application
    Filed: December 29, 2006
    Publication date: May 1, 2008
    Inventor: Heon Yong Chang
  • Patent number: 7332370
    Abstract: To effectively lower the current required for changing a phase of a phase change layer in a phase change RAM device, metal pads are formed on a semiconductor substrate, and an oxide layer is formed on the metal pads. Nano-sized copolymer patterns aligned with the metal pads covered by the oxide layer are formed on the oxide layer. The oxide layer is etched to form oxide layer patterns by using the nano-sized copolymer patterns as barrier. The nano-sized copolymer patterns are then removed. A nitride layer is deposited and then etched to expose the oxide layer patterns. The exposed oxide layer patterns are removed to form nano-sized holes exposing the metal pads. Bottom electrodes are then formed in the nano-sized holes. A phase change layer and a top electrode are formed on each of the bottom electrodes.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: February 19, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventors: Heon Yong Chang, Hae Chan Park, Suk Kyoung Hong
  • Publication number: 20070241385
    Abstract: Disclosed is a phase change memory device comprising: a semiconductor substrate formed with a first insulating interlayer having a contact hole; a lower electrode formed within the contact hole of the first insulating interlayer; an insulating layer pattern formed on the lower electrode in such a manner so as to be sized smaller than the lower electrode, thereby exposing an edge portion of the lower electrode; a phase change layer formed in such a manner so as to cover the insulating layer pattern and come in contact with the exposed edge portion of the lower electrode; and an upper electrode formed on the phase change layer.
    Type: Application
    Filed: December 29, 2006
    Publication date: October 18, 2007
    Inventor: Heon Yong Chang
  • Publication number: 20070241319
    Abstract: Disclosed is a phase change memory device including: a semiconductor substrate formed with a first insulating interlayer having a first contact hole; a contact plug formed in such a manner so as to be recessed within the first contact hole; a catalyst layer formed on the contact plug in such a manner so as to fill the first contact hole; a second insulating interlayer formed on the first insulating interlayer including the catalyst layer having a second contact hole through which the catalyst layer is exposed; a carbon nano tube lower electrode formed within the second contact hole in such a manner so as to come in contact with the catalyst layer; a phase change layer formed on the carbon nano tube lower electrode and a second insulating interlayer portion around the second contact hole; and an upper electrode formed on the phase change layer.
    Type: Application
    Filed: December 29, 2006
    Publication date: October 18, 2007
    Inventor: Heon Yong Chang
  • Patent number: 7262502
    Abstract: Disclosed are a phase-change random access memory device and a method for manufacturing the same. The phase-change random access memory includes a first insulation layer having first contact holes, conductive plugs for filling the first contact holes, a second insulation layer having a second contact hole, and a bit line. Third and fourth insulation layers and a nitride layer are sequentially formed on the second insulation layer and have third contact holes. Bottom electrodes are provided to fill the third contact holes. An opening is formed in order to expose a part of the third insulation layer and a cavity is connected with the opening so as to expose a part of the bottom electrode. A phase-change layer pattern is connected to one side of the bottom electrode. A top electrode is formed on the phase-change layer pattern.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: August 28, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Heon Yong Chang
  • Patent number: 7173271
    Abstract: Disclosed are a phase-change memory device and its manufacturing method, which can reduce a contact area between a bottom electrode and a phase-change layer, thereby reducing the quantity of current necessary for phase change. The phase-change memory device comprises: a first oxide layer formed on a dielectric interlayer and a bottom electrode on a substrate and having a contact hole for exposing the bottom electrode formed in the first oxide layer; a spacer formed on a side surface of the contact hole; a phase-change layer formed on the spacer and the bottom electrode while forming a shape of another spacer; a second oxide layer filling in the contact hole while exposing an upper portion of the phase-change layer; and a top electrode formed on the first oxide layer while being in contact with the upper portion of the phase-change layer.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: February 6, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Heon Yong Chang
  • Patent number: 7151300
    Abstract: Disclosed are a phase-change memory device and its manufacturing method, which can reduce a contact area between a bottom electrode and a phase-change layer, thereby reducing the quantity of current necessary for phase change. The phase-change memory device comprises: bottom electrodes and top electrodes formed on a dielectric interlayer, each of the bottom electrodes and the top electrodes having both side surfaces in contact with a first oxide layer, a phase-change layer, a nitride layer, and a second oxide layer; the phase-change layer formed between the first oxide layer and the nitride layer while being in contact with the side surfaces of the bottom electrodes and the top electrodes; a third oxide layer formed on the bottom electrodes and the top electrode; and a metal wire in contact with the top electrode.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: December 19, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Heon Yong Chang
  • Publication number: 20060281216
    Abstract: To effectively lower the current required for changing a phase of a phase change layer in a phase change RAM device, metal pads are formed on a semiconductor substrate, and an oxide layer is formed on the metal pads. Nano-sized copolymer patterns aligned with the metal pads covered by the oxide layer are formed on the oxide layer. The oxide layer is etched to form oxide layer patterns by using the nano-sized copolymer patterns as barrier. The nano-sized copolymer patterns are then removed. A nitride layer is deposited and then etched to expose the oxide layer patterns. The exposed oxide layer patterns are removed to form nano-sized holes exposing the metal pads. Bottom electrodes are then formed in the nano-sized holes. A phase change layer and a top electrode are formed on each of the bottom electrodes.
    Type: Application
    Filed: October 20, 2005
    Publication date: December 14, 2006
    Inventors: Heon Yong Chang, Hae Chan Park, Suk Kyoung Hong