Abstract: Seizable, connection-associated switching devices of various types emit processing requests with different urgency degrees to a central sequential logic system for information which are to be processed with different urgency dependent on type. A limit value which may be set in an occupation rejection device based on the measure of a continuously-measured, momentary sequential logic system load serves as a comparison normal and effects that processing requests are rejected (accepted) when the urgency value is lower than (greater than) the limit value.

Abstract: An interrogating device cyclically calling in information from various inquiry locations selects the various inquiry locations a different number of times, for which purpose addresses of the inquiry location are stored a different number of times in an interrogation control memory. When an interrogating device is not supplied with any information when an inquiry location is interrogated, the inquiry location is skipped the next time. To this end, when no information is received given selection of an inquiry location with its address, that memory location where the same address is again stored is first sought in the memory and a note bit is stored there. The memory location immediately following the previously-selected memory location is then sought in the memory and the appertaining, next inquiry location is selection with the address read. The note bit effects that the inquiry location which is interrogatable with the appertaining address is not interrogated once; the note bit is then erased.

Abstract: An interrogating device cyclically calling in an information from various inquiry locations controls the various inquiry locations differing in frequency to which end addresses of the inquiry locations are stored a different number of times in an interrogation control memory. When an interrogating device has not received any information upon interrogation of an inquiry location, then this inquiry location is skipped the next time. For this purpose, a note bit is stored in the interrogation control memory at the address which was just interrogated. When the same memory location in the interrogation memory is reached again after an interrogation cycle, the note bit effects that the address is not read and that the inquiry location is instead skipped once; the note bit is thereby erased in turn.

Abstract: A circuit arrangement for telecommunications exchange systems, particularly telepone exchange systems, comprising information processing sequential logic systems and traffic measuring devices, is provided for handling processing requests. Processing requests are marked by a sequential logic systems as partially acceptable and input into a waiting list formed as a FIFO buffer. Processing requests marked not acceptable are input into a FIFO-LIFO memory which ejects a processing request in a FIFO mode when it is full and when the waiting list is at least partially filled and marks them as not acceptable, but marks processing requests as acceptable and outputs the same to the waiting list in the LIFO mode when the waiting list is empty or nearly empty.