Abstract: A semiconductor device package includes a solid metal base with a top surface and an electrically conductive chip mounting area on the top surface. First and second pairs of conductive leads are attached to the base and extend away from one another in opposite directions. First and second amplifiers are attached to the top surface and are electrically connected to the first and second pairs of leads. The first pair is separated from the second pair by a horizontal gap between inner edge sides of the leads. A reference line in the horizontal gap that extends perpendicular to edges of the base divides the chip mounting area into first and second chip mounting sections. An area of the first chip mounting section is smaller than an area of the second chip mounting section. The first and second leads have a smaller width than the third and fourth leads.

Abstract: A semiconductor device package includes a solid metal base with a top surface and an electrically conductive chip mounting area on the top surface. First and second pairs of conductive leads are attached to the base and extend away from one another in opposite directions. First and second amplifiers are attached to the top surface and are electrically connected to the first and second pairs of leads. The first pair is separated from the second pair by a horizontal gap between inner edge sides of the leads. A reference line in the horizontal gap that extends perpendicular to edges of the base divides the chip mounting area into first and second chip mounting sections. An area of the first chip mounting section is smaller than an area of the second chip mounting section. The first and second leads have a smaller width than the third and fourth leads.