Abstract: Novel phase locked loop architectures that can overcome the limitation of the maximum operating frequency of the fractional-N phase-locked loop (PLL) for fast-chirp frequency modulated continuous wave (FMCW) radars are suggested. Several phase frequency detector and charge pumps (PFD&CPs) are put in parallel and are operated with reference signals that are generated by using a delay-locked loop (DLL) instead of further increasing the operating frequency of the PFD&CP. The proposed DLL supported parallel PLL architectures enable further speeding up the FMCW chirp as well as improving its linearity and the performance of Range Doppler Radars based on fast-chirp FMCW radar. Methods for operating the parallel fractional N phase locked loop are proposed.

Abstract: Novel phase locked loop architectures that can overcome the limitation of the maximum operating frequency of the fractional-N phase-locked loop (PLL) for fast-chirp frequency modulated continuous wave (FMCW) radars are suggested. Several phase frequency detector and charge pumps (PFD&CPs) are put in parallel and are operated with reference signals that are generated by using a delay-locked loop (DLL) instead of further increasing the operating frequency of the PFD&CP. The proposed DLL supported parallel PLL architectures enable further speeding up the FMCW chirp as well as improving its linearity and the performance of Range Doppler Radars based on fast-chirp FMCW radar. Methods for operating the parallel fractional N phase locked loop are proposed.

Abstract: The present invention relates to a wire-bound transmission of data, as occurs, for example, between a sensor and a control unit. In order to save lines, both the supply voltage and the data signal to be transmitted are transmitted over the same line. The field of the present invention relates to the extraction of data signals from the supply voltage line.

Abstract: A receiving stage for a multi-stage signal modulated upon a supply voltage, including: a supply potential terminal and a ground potential terminal, a voltage divider and a low-pass filter, whose input is connected to the supply potential terminal and the ground potential terminal, and which has an output which is arranged to output the low-pass filter output signal.

Abstract: A mixer stage is provided that includes an oscillator, a first input, a second input, a first output, a second output, a set of four controllable amplifier elements, and a first current source. The mixer stage further includes at least one second current source in addition to the first current source, the first current source and the at least one second current source can each be switched on and off by an associated switching input that is connected to an associated oscillator output. Pairs of amplifier elements of the set of four together with at least one of the at least two current sources in its switched-on state form a differential amplifier for an input signal present at the first input and the second input. A method for mixing frequencies is also provided.