Abstract: A molded package with a leadframe locking structure is shown. A lower leadframe consists of a frame member, a connecting element extending therefrom, a mounting member at the distal end of the connecting element, and at least one side element projecting from the mounting member. Electrical connection is made between the mounting member and a semiconductor device. An upper leadframe consists of a frame member and an extending lead element which makes electrical contact with an upper surface of the semiconductor device. There is at least one side element bent up to a predetermined angle relative to the mounting member so that an encapsulant will be locked in place, minimizing the possibility of semiconductor contamination via boundaries between the encapsulant and the leadframes. The encapsulant, such as plastic or epoxy, is transfer or injection molded over the lead element, over the semiconductor device, about the side element, and on top of the mounting member to form the completed package.

Abstract: A hermetically sealed, surface mount chip carrier for a semiconductor device is disclosed. The chip carrier is formed of a plurality of layers of conductive material and insulating material. A cavity adapted to receive the semiconductor device is provided within the layers. The device is electrically connected to the conductive layers via electrical conductors bonded to exposed surfaces or shelves on selected ones of the conductive layers. The layers have a continuous periphery to eliminate gaps or vertical discontiniuties in the chip carrier. The conductive and insulating layers have similar coefficients of thermal expansion to provide unitary expansion and contraction of the entire carrier so as to maintain a hermetic seal in the chip carrier when subjected to thermal stresses.