Abstract: An analog-digital converter includes a differential amplifier having collector resistances each being in the form of a resistance line. Node points between resistance segments of the resistance lines are in the form of output terminals. Comparators with a balanced input are provided in the same amount as the resistance segments. In each case one input of a comparator is connected to an output terminal of a first resistance line and another input of the comparator is connected to an output terminal of a second resistance line. Therefore, the same resistance value in each case acts between two output terminals, which are connected to one comparator, in the collector circuit of the differential amplifier.

Abstract: A circuit configuration includes a symmetrically constructed sample and hold amplifier. A first switchable level shifter has an input in the form of a first signal input terminal for receiving a given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. A second switchable level shifter has an input in the form of a second signal input terminal for receiving a signal complementary to the given signal, and an output being connected to the sample and hold amplifier for supplying a differential output signal. The input and output signals of each of the switchable level shifters having a different constant direct voltage difference as a function of the switching state of the level shifters.

Abstract: A sample and hold circuit configuration for differential signals with reduced holding capacity includes an amplifier in which the same current ratios prevail in the collector circuit and in the emitter circuit. The base currents are discharged through additional transistors and therefore the same currents flow and equal voltage ratios prevail in the collector and emitter resistors, and an additional diode is connected in each collector circuit.