Patents by Inventor Hernan A. Rueda

Hernan A. Rueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9818862
    Abstract: A semiconductor device with a current terminal region located in a device active area of a substrate of the device. A guard region is located in a termination area of the device. A plurality of floating field plates are located in the termination area and are ohmically coupled to the guard region. The floating field plates and guard region act in some embodiments to “smooth” the electrical field distribution along the termination area.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: November 14, 2017
    Assignee: NXP USA, INC.
    Inventors: Zihao M. Gao, David C. Burdeaux, Wayne Robert Burger, Christopher P. Dragon, Hernan A. Rueda
  • Publication number: 20170194488
    Abstract: A semiconductor device with a current terminal region located in a device active area of a substrate of the device. A guard region is located in a termination area of the device. A plurality of floating field plates are located in the termination area and are ohmically coupled to the guard region. The floating field plates and guard region act in some embodiments to “smooth” the electrical field distribution along the termination area.
    Type: Application
    Filed: January 5, 2016
    Publication date: July 6, 2017
    Inventors: ZIHAO M. GAO, DAVID C. BURDEAUX, WAYNE ROBERT BURGER, CHRISTOPHER P. DRAGON, HERNAN A. RUEDA
  • Patent number: 8518764
    Abstract: A semiconductor device structure includes a substrate having a background doping of a first concentration and of a first conductivity type. A through substrate via (TSV) is through the substrate. A device has a first doped region of a second conductivity on a first side of the substrate. A second doped region is around the TSV. The second doped region has a doping of a second concentration greater than the first concentration and is of the first conductivity type.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: August 27, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Thuy B. Dao, Joel E. Keys, Hernan A. Rueda, Paul W. Sanders
  • Publication number: 20130099312
    Abstract: A semiconductor device structure includes a substrate having a background doping of a first concentration and of a first conductivity type. A through substrate via (TSV) is through the substrate. A device has a first doped region of a second conductivity on a first side of the substrate. A second doped region is around the TSV. The second doped region has a doping of a second concentration greater than the first concentration and is of the first conductivity type.
    Type: Application
    Filed: October 24, 2011
    Publication date: April 25, 2013
    Inventors: Thuy B. Dao, Joel E. Keys, Hernan A. Rueda, Paul W. Sanders
  • Patent number: 8324064
    Abstract: Methods are disclosed for forming an improved varactor diode having first and second terminals. The methods include providing a substrate having a first surface in which are formed isolation regions separating first and second parts of the diode. A varactor junction is formed in the first part with a first side coupled to the first terminal and a second side coupled to the second terminal via a sub-isolation buried layer (SIBL) region extending under the bottom and partly up the sides of the isolation regions to a further doped region that is ohmically connected to the second terminal. The first part does not extend to the SIBL region. The varactor junction desirably comprises a hyper-abrupt doped region. The combination provides improved tuning ratio, operating frequency and breakdown voltage of the varactor diode while still providing adequate Q.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: December 4, 2012
    Assignee: Freescale Semiconductors, Inc.
    Inventors: Pamela J. Welch, Wen Ling M. Huang, David G. Morgan, Hernan A. Rueda, Vishal P. Trivedi
  • Publication number: 20120021586
    Abstract: Methods are disclosed for forming an improved varactor diode having first and second terminals. The methods include providing a substrate having a first surface in which are formed isolation regions separating first and second parts of the diode. A varactor junction is formed in the first part with a first side coupled to the first terminal and a second side coupled to the second terminal via a sub-isolation buried layer (SIBL) region extending under the bottom and partly up the sides of the isolation regions to a further doped region that is ohmically connected to the second terminal. The first part does not extend to the SIBL region. The varactor junction desirably comprises a hyper-abrupt doped region. The combination provides improved tuning ratio, operating frequency and breakdown voltage of the varactor diode while still providing adequate Q.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Pamela J. Welch, Wen Ling M. Huang, David G. Morgan, Hernan A. Rueda, Vishal P. Trivedi
  • Publication number: 20110031588
    Abstract: An improved varactor diode (20, 50) having first (45) and second (44) terminals is obtained by providing a substrate (22, 52) having a first surface (21, 51) in which are formed isolation regions (28, 58) separating first (23, 53) and second (25, 55) parts of the diode (20, 50). A varactor junction (40, 70) is formed in the first part (23, 53) and having a first side (35, 66) coupled to the first terminal (45) and a second side (34, 54) coupled to the second terminal (44) via a sub-isolation buried layer (SIBL) region (26, 56) extending under the bottom (886) and partly up the sides (885) of the isolation regions (28, 58) to a further doped region (30, 32; 60, 62) ohmically connected to the second terminal (44). The first part (36, 66) does not extend to the SIBL region (26, 56). The varactor junction (40, 70) desirably comprises a hyper-abrupt doped region (34, 54).
    Type: Application
    Filed: August 6, 2009
    Publication date: February 10, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Pamela J. Welch, Wen Ling Huang, David G. Morgan, Hernan A. Rueda, Vishal P. Trivedi