Patents by Inventor Herve Deslandes

Herve Deslandes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10620263
    Abstract: An apparatus and method for optical probing of a DUT is disclosed. The system enables identifying, localizing and classifying faulty devices within the DUT. A selected area of the DUT is imaged while the DUT is receiving test signals, which may be static or dynamic, i.e., causing certain of the active devices to modulate. Light from the DUT is collected and is passed through a rotatable diffracting element prior to imaging it by a sensor and converting it into an electrical signal. The resulting image changes depending on the rotational positioning of the grating. The diffracted image is inspected to identify, localize and classify faulty devices within the DUT.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: April 14, 2020
    Assignee: FEI EFA, Inc.
    Inventors: Herve Deslandes, Prasad Sabbineni, Regina Freed
  • Patent number: 10514418
    Abstract: A method for emission testing of a semiconductor device (DUT), by mounting the DUT onto an test bench of an emission tester, the emission tester having an optical detector; electrically connecting the DUT to an electrical tester; applying electrical test signals to the DUT while keeping test parameters constant; inserting an optical filters into an optical path of the emission tester and collecting emission test signal from the optical detector; removing the filter from the optical path and collecting emission test signal from the optical detector. Comparing the images obtained with and without the filter. The filter may be shortpass to obtain emission signal, a bandpass for detecting forward bias, or longpass to obtain thermal signal.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: December 24, 2019
    Assignee: FEI Company
    Inventor: Herve Deslandes
  • Publication number: 20180328985
    Abstract: An apparatus and method for optical probing of a DUT is disclosed. The system enables identifying, localizing and classifying faulty devices within the DUT. A selected area of the DUT is imaged while the DUT is receiving test signals, which may be static or dynamic, i.e., causing certain of the active devices to modulate. Light from the DUT is collected and is passed through a rotatable diffracting element prior to imaging it by a sensor and converting it into an electrical signal. The resulting image changes depending on the rotational positioning of the grating. The diffracted image is inspected to identify, localize and classify faulty devices within the DUT.
    Type: Application
    Filed: July 3, 2018
    Publication date: November 15, 2018
    Applicant: FEI EFA, Inc.
    Inventors: Herve Deslandes, Prasad Sabbineni, Regina Freed
  • Patent number: 10049949
    Abstract: An IR camera is used to image an IC to identify hot spots. The objective of the IR camera is removed and laser optics are inserted into the optical axis of the system. A laser is then used to ablate the encapsulation in a defined area around the optical axis. The IR camera operates in a lock-in mode to obtain phase information of the IR signal from the IC. The phase information is used to obtain a depth estimate of the defect. Predetermined etch rates are then used in conjunction with the depth estimate to generate a timed end-point for the laser ablation.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: August 14, 2018
    Assignee: FEI Company
    Inventors: Tameyasu Anayama, John Muzzio, Herve Deslandes
  • Patent number: 10041997
    Abstract: An apparatus and method for optical probing of a DUT is disclosed. The system enables identifying, localizing and classifying faulty devices within the DUT. A selected area of the DUT is imaged while the DUT is receiving test signals, which may be static or dynamic, i.e., causing certain of the active devices to modulate. Light from the DUT is collected and is passed through a rotatable diffracting element prior to imaging it by a sensor and converting it into an electrical signal. The resulting image changes depending on the rotational positioning of the grating. The diffracted image is inspected to identify, localize and classify faulty devices within the DUT.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: August 7, 2018
    Assignee: FEI EFA, Inc.
    Inventors: Herve Deslandes, Prasad Sabbineni, Regina Freed
  • Patent number: 9903824
    Abstract: An apparatus and method for optical probing of a DUT is disclosed. The system enables identifying, localizing and classifying faulty devices within the DUT. A selected area of the DUT is imaged while the DUT is receiving test signals, which may be static or dynamic, i.e., causing certain of the active devices to modulate. Light from the DUT is collected and is passed through a transparent diffracting grating prior to imaging it by a sensor and converting it into an electrical signal. The resulting image includes the zero order and first order diffraction of the grating. The grating is configured such that the zero order is in registration with emission sites imaged when the grating is outside the optical path.
    Type: Grant
    Filed: April 8, 2015
    Date of Patent: February 27, 2018
    Assignee: FEI EFA, Inc.
    Inventors: Herve Deslandes, Antoine Reverdy, Thierry Parrassin
  • Patent number: 9817060
    Abstract: A method for emission testing of a semiconductor device (DUT), by mounting the DUT onto an test bench of an emission tester, the emission tester having an optical detector; electrically connecting the DUT to an electrical tester; applying electrical test signals to the DUT while keeping test parameters constant; serially inserting one of a plurality of shortpass filters into an optical path of the emission tester and collecting emission test signal from the optical detector until all available shortpass filters have been inserted into the optical path; determining appropriate shortpass filter providing highest signal to noise ratio of the emission signal; inserting the appropriate shortpass filter into the optical path; and, performing emission testing on the DUT.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: November 14, 2017
    Assignee: FEI EFA, Inc.
    Inventor: Herve Deslandes
  • Publication number: 20170117233
    Abstract: An IR camera is used to image an IC to identify hot spots. The objective of the IR camera is removed and laser optics are inserted into the optical axis of the system. A laser is then used to ablate the encapsulation in a defined area around the optical axis. The IR camera operates in a lock-in mode to obtain phase information of the IR signal from the IC. The phase information is used to obtain a depth estimate of the defect. Predetermined etch rates are then used in conjunction with the depth estimate to generate a timed end-point for the laser ablation.
    Type: Application
    Filed: October 21, 2016
    Publication date: April 27, 2017
    Inventors: Tameyasu Anayama, John Muzzio, Herve Deslandes
  • Publication number: 20170052223
    Abstract: A method for emission testing of a semiconductor device (DUT), by mounting the DUT onto an test bench of an emission tester, the emission tester having an optical detector; electrically connecting the DUT to an electrical tester; applying electrical test signals to the DUT while keeping test parameters constant; inserting an optical filters into an optical path of the emission tester and collecting emission test signal from the optical detector; removing the filter from the optical path and collecting emission test signal from the optical detector. Comparing the images obtained with and without the filter. The filter may be shortpass to obtain emission signal, a bandpass for detecting forward bias, or longpass to obtain thermal signal.
    Type: Application
    Filed: October 5, 2016
    Publication date: February 23, 2017
    Inventor: Herve Deslandes
  • Patent number: 9322715
    Abstract: A non-destructive approach for the 3D localization of buried hot spots in electronic device architectures by use of Lock-in Thermography (LIT). The 3D analysis is based on the principles of thermal wave propagation through different material layers and the resulting phase shift/thermal time delay. With more complex multi level stacked die architectures it is necessary to acquire multiple LIT results at different excitation frequencies for precise hot spot depth localization. Additionally, the use of multiple time-resolved thermal waveforms, measured in a minimized field of view on top of the hot spot location, can be used to speed up the data acquisition. The shape of the resulting waveforms can be analyzed to further increase the detection accuracy and confidence level.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: April 26, 2016
    Assignees: DCG SYSTEMS, INC., FRAUNHOFER-GESELLSCHAFT ZUR FĂ–RDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
    Inventors: Frank Altmann, Christian Schmidt, Rudolf Schlangen, Herve Deslandes
  • Publication number: 20150338458
    Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.
    Type: Application
    Filed: August 3, 2015
    Publication date: November 26, 2015
    Inventors: Herve Deslandes, Rudolf Schlangen, Prasad Sabbineni, Antoine Reverdy, Ingrid De Wolf
  • Publication number: 20150293037
    Abstract: An apparatus and method for optical probing of a DUT is disclosed. The system enables identifying, localizing and classifying faulty devices within the DUT. A selected area of the DUT is imaged while the DUT is receiving test signals, which may be static or dynamic, i.e., causing certain of the active devices to modulate. Light from the DUT is collected and is passed through a transparent diffracting grating prior to imaging it by a sensor and converting it into an electrical signal. The resulting image includes the zero order and first order diffraction of the grating. The grating is configured such that the zero order is in registration with emission sites imaged when the grating is outside the optical path.
    Type: Application
    Filed: April 8, 2015
    Publication date: October 15, 2015
    Inventors: Herve Deslandes, Antoine Reverdy, Thierry Parrassin
  • Publication number: 20150260789
    Abstract: An apparatus and method for optical probing of a DUT is disclosed. The system enables identifying, localizing and classifying faulty devices within the DUT. A selected area of the DUT is imaged while the DUT is receiving test signals, which may be static or dynamic, i.e., causing certain of the active devices to modulate. Light from the DUT is collected and is passed through a rotatable diffracting element prior to imaging it by a sensor and converting it into an electrical signal. The resulting image changes depending on the rotational positioning of the grating. The diffracted image is inspected to identify, localize and classify faulty devices within the DUT.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 17, 2015
    Inventors: Herve Deslandes, Prasad Sabbineni, Regina Freed
  • Patent number: 9098892
    Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: August 4, 2015
    Assignee: DCG SYSTEMS, INC.
    Inventors: Herve Deslandes, Rudolf Schlangen, Prasad Sabbineni, Antoine Reverdy, Ingrid De Wolf
  • Patent number: 9025020
    Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: May 5, 2015
    Assignee: DCG Systems, Inc.
    Inventors: Herve Deslandes, Rudolf Schlangen, Prasad Sabbineni, Antoine Reverdy, Ingrid De Wolf
  • Publication number: 20150091602
    Abstract: A method for emission testing of a semiconductor device (DUT), by mounting the DUT onto an test bench of an emission tester, the emission tester having an optical detector; electrically connecting the DUT to an electrical tester; applying electrical test signals to the DUT while keeping test parameters constant; serially inserting one of a plurality of shortpass filters into an optical path of the emission tester and collecting emission test signal from the optical detector until all available shortpass filters have been inserted into the optical path; determining appropriate shortpass filter providing highest signal to noise ratio of the emission signal; inserting the appropriate shortpass filter into the optical path; and, performing emission testing on the DUT.
    Type: Application
    Filed: April 10, 2014
    Publication date: April 2, 2015
    Applicant: DCG Systems, Inc.
    Inventor: Herve Deslandes
  • Publication number: 20140346360
    Abstract: A non-destructive approach for the 3D localization of buried hot spots in electronic device architectures by use of Lock-in Thermography (LIT). The 3D analysis is based on the principles of thermal wave propagation through different material layers and the resulting phase shift/thermal time delay. With more complex multi level stacked die architectures it is necessary to acquire multiple LIT results at different excitation frequencies for precise hot spot depth localization. Additionally, the use of multiple time-resolved thermal waveforms, measured in a minimized field of view on top of the hot spot location, can be used to speed up the data acquisition. The shape of the resulting waveforms can be analyzed to further increase the detection accuracy and confidence level.
    Type: Application
    Filed: June 2, 2014
    Publication date: November 27, 2014
    Applicants: DCG Systems, Inc., Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.
    Inventors: Frank Altmann, Christian Schmidt, Rudolf Schlangen, Herve Deslandes
  • Publication number: 20140210994
    Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.
    Type: Application
    Filed: April 2, 2014
    Publication date: July 31, 2014
    Applicant: DCG Systems, Inc.
    Inventors: Herve Deslandes, Rudolf Schlangen, Prasad Sabbineni, Antoine Reverdy, Ingrid De Wolf
  • Publication number: 20140191111
    Abstract: An optical detector is disclosed, having a plurality of detector cells, each detector cell comprising a light sensor, a charge accumulator, and a switch interposed between the light sensor and the charge accumulator; wherein the light sensor produces electrical current when illuminated by electromagnetic radiation, the charge accumulator accumulate electric charge when receiving the electrical current generated by the light sensor, and the switch is configured to controllably electrically isolate or connect the charge accumulator to light sensor, such that the charge accumulator accumulates charge only when electrically connected by the switch to the light sensor.
    Type: Application
    Filed: December 4, 2013
    Publication date: July 10, 2014
    Applicant: DCG Systems, Inc.
    Inventor: Herve Deslandes
  • Patent number: 8742347
    Abstract: A non-destructive approach for the 3D localization of buried hot spots in electronic device architectures by use of Lock-in Thermography (LIT). The 3D analysis is based on the principles of thermal wave propagation through different material layers and the resulting phase shift/thermal time delay. With more complex multi level stacked die architectures it is necessary to acquire multiple LIT results at different excitation frequencies for precise hot spot depth localization. Additionally, the use of multiple time-resolved thermal waveforms, measured in a minimized field of view on top of the hot spot location, can be used to speed up the data acquisition. The shape of the resulting waveforms can be analyzed to further increase the detection accuracy and confidence level.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: June 3, 2014
    Assignees: DCG Systems, Inc., Fraunhofer-Gesellschaft zur Förderung der Angewandten Forschung e.V.
    Inventors: Frank Altmann, Christian Schmidt, Rudolf Schlangen, Herve Deslandes