Abstract: A bus system (10) comprises a bus controller (12) and a bus wiring (14) comprising at least one bus line (16) and connected at one end to the bus controller (12). A number of connectors (221 . . . 224) for peripheral units (24) are arranged in series along the bus wiring (14) and a number of peripheral units (24) are each connected to a respective connector (22i) on the bus wiring (14). The bus system (10) is designed in such a way that, as long as a peripheral unit (24) has not been connected to a given connector (22i), communication in the at least one bus line (16) downstream of this connector (22i) is interrupted, and that upon connection to a peripheral unit (24) communication in the at least one bus line (16) is restored at this connector (22i). The bus controller (12) comprises means for detecting a default-addressed peripheral unit (24) on the bus wiring (14) and assigning an address thereto.