Patents by Inventor Herwig Hahn

Herwig Hahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10355453
    Abstract: A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: July 16, 2019
    Assignee: International Business Machines Corporation
    Inventors: Herwig Hahn, Charles Caër
  • Publication number: 20190190235
    Abstract: The invention is directed to a hybrid, vertical current injection electro-optical device, comprising an active region and one or more current blocking layers. The active region includes a stack of III-V semiconductor gain materials designed for optical amplification. The gain materials of the stack are stacked along a stacking direction z, which is perpendicular to a main plane of the stack. The one or more current blocking layers extend perpendicularly to the stacking direction z and laterally on opposite sides of the active region. The one or more current blocking layers each have an effective refractive index n1 that is matched to the effective refractive index n of the active region, i.e., n1=f×n, with f ? [0.95; 1.05]. The invention is further directed to a silicon photonics chip comprising such an electro-optical device.
    Type: Application
    Filed: December 19, 2017
    Publication date: June 20, 2019
    Inventors: Gustavo Ferreira Villares, Herwig Hahn, Marc Seifried
  • Publication number: 20190140425
    Abstract: A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 9, 2019
    Inventors: Herwig Hahn, Charles Caër
  • Patent number: 10283931
    Abstract: An electro-optical device having two wafer components and a device fabrication method. A first wafer component includes a silicon substrate and a cladding layer on top thereof. The cladding layer comprises a cavity formed therein, wherein the cavity is filled with an electrically insulating thermal spreader, which has a thermal conductivity larger than that of the cladding layer. The second wafer component comprises a stack of III-V semiconductor gain materials, designed for optical amplification of a given radiation. The second wafer component is bonded to the first wafer component, such that the stack of III-V semiconductor gain materials is in thermal communication with the thermal spreader. In addition, the thermal spreader has a refractive index that is lower than each of the refractive index of the silicon substrate and an average refractive index of the stack of III-V semiconductor gain materials for said given radiation.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: May 7, 2019
    Assignee: International Business Machines Corporation
    Inventors: Charles Caër, Herwig Hahn
  • Patent number: 10256603
    Abstract: An electro-optical device having two wafer components and a device fabrication method. A first wafer component includes a silicon substrate and a cladding layer on top thereof. The cladding layer comprises a cavity formed therein, wherein the cavity is filled with an electrically insulating thermal spreader, which has a thermal conductivity larger than that of the cladding layer. The second wafer component comprises a stack of III-V semiconductor gain materials, designed for optical amplification of a given radiation. The second wafer component is bonded to the first wafer component, such that the stack of III-V semiconductor gain materials is in thermal communication with the thermal spreader. In addition, the thermal spreader has a refractive index that is lower than each of the refractive index of the silicon substrate and an average refractive index of the stack of III-V semiconductor gain materials for said given radiation.
    Type: Grant
    Filed: November 6, 2017
    Date of Patent: April 9, 2019
    Assignee: International Business Machines Corporation
    Inventors: Charles Caër, Herwig Hahn
  • Publication number: 20190096916
    Abstract: An ultra-thin-body GaN-on-Insulator device and a method of manufacturing may be provided. The device comprises a front-end-of-line processed CMOS platform terminated with an interlayer dielectric material, a first bonding layer atop the interlayer dielectric material and an ultra-thin-body GaN-based hetero-structure terminated with a second bonding layer. The GaN-based hetero-structure is bonded with the second bonding layer to the first bonding layer of the CMOS platform building the ultra-thin-body GaN-on-Insulator device.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 28, 2019
    Inventors: Lukas Czornomaz, Herwig Hahn
  • Publication number: 20180323575
    Abstract: An electro-optical device having two wafer components and a device fabrication method. A first wafer component includes a silicon substrate and a cladding layer on top thereof. The cladding layer comprises a cavity formed therein, wherein the cavity is filled with an electrically insulating thermal spreader, which has a thermal conductivity larger than that of the cladding layer. The second wafer component comprises a stack of III-V semiconductor gain materials, designed for optical amplification of a given radiation. The second wafer component is bonded to the first wafer component, such that the stack of III-V semiconductor gain materials is in thermal communication with the thermal spreader. In addition, the thermal spreader has a refractive index that is lower than each of the refractive index of the silicon substrate and an average refractive index of the stack of III-V semiconductor gain materials for said given radiation.
    Type: Application
    Filed: November 6, 2017
    Publication date: November 8, 2018
    Inventors: Charles Caër, Herwig Hahn
  • Publication number: 20180323574
    Abstract: An electro-optical device having two wafer components and a device fabrication method. A first wafer component includes a silicon substrate and a cladding layer on top thereof. The cladding layer comprises a cavity formed therein, wherein the cavity is filled with an electrically insulating thermal spreader, which has a thermal conductivity larger than that of the cladding layer. The second wafer component comprises a stack of III-V semiconductor gain materials, designed for optical amplification of a given radiation. The second wafer component is bonded to the first wafer component, such that the stack of III-V semiconductor gain materials is in thermal communication with the thermal spreader. In addition, the thermal spreader has a refractive index that is lower than each of the refractive index of the silicon substrate and an average refractive index of the stack of III-V semiconductor gain materials for said given radiation.
    Type: Application
    Filed: May 5, 2017
    Publication date: November 8, 2018
    Inventors: Charles Caër, Herwig Hahn
  • Publication number: 20180240820
    Abstract: The present invention is notably directed to an electro-optical device. The latter comprises a layer structure with: a silicon substrate; a buried oxide layer over the silicon substrate; a tapered silicon waveguide core over the buried oxide layer, the silicon waveguide core cladded by a first cladding structure; a bonding layer over the first cladding structure; and a stack of III-V semiconductor gain materials on the bonding layer, the stack of III-V semiconductor gain materials cladded by a second cladding structure. The layer structure is configured to optically couple radiation between the stack of III-V semiconductor gain materials and the tapered silicon waveguide core. The first cladding structure comprises a material having: a refractive index that is larger than 1.54 for said radiation; and a bandgap, which, in energy units, is larger than an average energy of said radiation.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 23, 2018
    Inventors: Utz Herwig Hahn, Marc Seifried
  • Publication number: 20180241176
    Abstract: The present invention is notably directed to an electro-optical device. This device has a layer structure, which comprises a stack of III-V semiconductor gain materials, an n-doped layer and a p-doped layer. The III-V materials are stacked along a stacking direction z, which is perpendicular to a main plane of the stack. The n-doped layer extends essentially parallel to the main plane of the stack, on one side thereof. The p-doped layer too extends essentially parallel to this main plane, but on another side thereof. A median vertical plane can be defined in the layer structure, which plane is parallel to the stacking direction z and perpendicular to the main plane of the stack. Now, the device further comprises two sets of ohmic contacts, wherein the ohmic contacts of each set are configured for vertical current injection in the stack of III-V semiconductor gain materials.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 23, 2018
    Inventors: Stefan Abel, Lukas Czornomaz, Jean Fompeyrine, Utz Herwig Hahn, Folkert Horst, Marc Seifried
  • Patent number: 9978872
    Abstract: A non-polar, III-Nitride semiconductor fin field-effect transistor (hereafter “finFET”) includes both a fin and a Si(110) silicon substrate, the silicon substrate having a support surface parallel to a Si(110) plane of the silicon substrate. The fin includes a III-Nitride crystalline layer grown along its c-direction, so as to have sidewalls that are parallel to m and a planes of the III-Nitride crystalline layer. The c-direction is parallel to a Si<111> direction of the silicon substrate, such that two opposite ones of said sidewalls are parallel to the support surface of the silicon substrate. Related devices and methods of fabrication are also provided.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: May 22, 2018
    Assignee: International Business Machines Corporation
    Inventors: Utz Herwig Hahn, Heinz Schmid
  • Patent number: 9941664
    Abstract: A hybrid III-V on silicon laser device includes a layer structure, with a stack of III-V semiconductor gain materials, a silicon waveguide core and a cladding structure. The semiconductor gain materials stack is along a stacking direction, which is perpendicular to a main plane of the stack. The silicon waveguide core extends along a longitudinal direction, parallel to the main plane. The cladding structure extends between said waveguide core and the stack. The device further comprises an optical coupling structure formed in the layer structure. This coupling structure is designed: 1) to allow a hybrid-mode optical coupling of radiation between the stack of III-V semiconductor gain materials and the tapered waveguide core; and 2) to favor a coupling of a fundamental transverse optical mode of said radiation over a coupling of one or more higher-order transverse optical modes of said radiation from the stack into the waveguide core.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: April 10, 2018
    Assignee: International Business Machines Corporation
    Inventors: Herwig Hahn, Folkert Horst, Marc Seifried
  • Patent number: 9917171
    Abstract: A device includes an n-doped InP layer and an ohmic contact, in contact with the n-doped InP layer. The ohmic contact includes an annealed stack of at least three, or preferably four alternating layers of Si and Ni, such that: (i) the n-doped InP layer and one of the layers of the stack in contact with the n-doped InP layer are at least partly intermixed; and (ii) any two adjacent layers of the stack are at least partly intermixed. Related fabrication methods are also disclosed.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: March 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Utz Herwig Hahn
  • Publication number: 20180026111
    Abstract: A device includes an n-doped InP layer and an ohmic contact, in contact with the n-doped InP layer. The ohmic contact includes an annealed stack of at least three, or preferably four alternating layers of Si and Ni, such that: (i) the n-doped InP layer and one of the layers of the stack in contact with the n-doped InP layer are at least partly intermixed; and (ii) any two adjacent layers of the stack are at least partly intermixed. Related fabrication methods are also disclosed.
    Type: Application
    Filed: July 21, 2016
    Publication date: January 25, 2018
    Inventor: Utz Herwig Hahn