Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.

Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.

Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.

Abstract: A method for processing a substrate includes generating a first laser beam, splitting the first laser beam into a plurality of second laser beams, focusing the split second laser beams on a plane in the substrate parallel to a main surface of the substrate, and performing surface separation of the substrate along the plane.

Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.

Abstract: A method of fabricating a semiconductor device includes preparing a semiconductor wafer having a top surface and a bottom surface. The semiconductor wafer is loaded onto a wafer chuck, and the bottom surface of the loaded semiconductor wafer faces the wafer chuck. A groove is formed in the top surface of the loaded semiconductor wafer by irradiating a second laser onto the top surface, and a reforming region is formed in the loaded semiconductor wafer under the groove by irradiating a first laser through wafer chuck and bottom surface of the semiconductor wafer into a region in which the first laser is focused. The semiconductor wafer is unloaded from the wafer chuck. The bottom surface of the semiconductor wafer is ground to decrease a thickness of the semiconductor wafer. The semiconductor wafer is separated along the groove and the reforming region, thereby forming a plurality of unit chips.

Abstract: A semiconductor package and a method of manufacturing the package are provided. The semiconductor package comprises: a mounting substrate including a bond finger; at least one semiconductor chip disposed on the mounting substrate, the semiconductor chip including a bonding pad; a first molding member disposed on the mounting substrate so as to cover the bond finger and the bonding pad, the first molding member including an interconnection path disposed inside the first molding member so as to connect the bond finger to the bonding pad; a conductive element disposed in the interconnection path; and a second molding member overlying the first molding member. The interconnection path can be formed by a laser process. The conductive element can be formed by conductive nanoparticles or metal wires.

Abstract: A Package-on-Package (POP) semiconductor package has a structure in which a second semiconductor package is stacked on a first semiconductor package. A plurality of spacers are disposed between a first substrate of the first semiconductor package and a second substrate of the second semiconductor package so as to maintain a gap between the first substrate and the second substrate. The plurality of spacers may project from a bottom surface of the second substrate toward the first substrate, or may project from a top surface of the first substrate toward the second substrate. When an upper molding layer is formed on the second substrate so as to cover a second semiconductor chip, the plurality of spacers may be connected to the upper molding layer via through holes that vertically pass through the second substrate.

Abstract: A method of molding a semiconductor package includes coating liquid molding resin or disposing solid molding resin on a top surface of a semiconductor chip arranged on a substrate. The solid molding resin may include powdered molding resin or sheet-type molding resin. In a case where liquid molding resin is coated on the top surface of the semiconductor chip, the substrate is mounted between a lower molding and an upper molding, and then melted molding resin is filled in a space between the lower molding and the upper molding. In a case where the solid molding resin is disposed on the top surface of the semiconductor chip, the substrate is mounted on a lower mold and then the solid molding resin is heated and melts into liquid molding resin having flowability. An upper mold is mounted on the lower mold, and melted molding resin is filled in a space between the lower molding and the upper molding.

Abstract: A method for processing a substrate includes generating a first laser beam, splitting the first laser beam into a plurality of second laser beams, focusing the split second laser beams on a plane in the substrate parallel to a main surface of the substrate, and performing surface separation of the substrate along the plane.

Abstract: A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance.

Abstract: In a wafer polishing apparatus, the height of the wheel tip can be adjusted. The wafer polishing apparatus includes a wheel tip constructed and arranged to be in direct contact with a wafer; a spindle shaft configured to receive power to enable rotation of the wheel tip; a wheel shank positioned at a lower part of the spindle shaft and supporting the wheel tip, the wheel tip not being directly fixed thereto; and a moving shaft having a first side on which the wheel tip is mounted and an opposite side to which the spindle shaft is connected, and relatively movable with respect to the spindle shaft.

Abstract: A stack-type semiconductor device including semiconductor chips having different backside structures and an electronic apparatus including the stack-type semiconductor device include: a base frame for a semiconductor device; a first semiconductor chip that is mounted on the base frame and has a bottom surface having a first surface roughness; and a second semiconductor chip that is mounted on the first semiconductor chip and has a bottom surface having a second surface roughness, wherein the second surface roughness is greater than the first surface roughness by 1.2 nm or more. The stack-type semiconductor device is manufactured to be thin while cracking of the first semiconductor chip is prevented. In addition, changes in data caused by charge loss resulting from diffusion of metal ions, which can occur when a stack-type semiconductor device is a memory device, is prevented.

Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

Abstract: A lead frame unit, a semiconductor package having a lead frame unit, a stacked semiconductor package having a semiconductor package, and methods of manufacturing the same are provided. The lead frame unit in a stacked semiconductor package may include a die pad supporting a semiconductor chip, an inner lead electrically connected to the semiconductor chip, an outer lead extending from the inner lead, and a heat-resistant insulation member surrounding the connection portion. The outer lead may include a connection portion connected to the inner lead and a junction portion connected to the connection portion and a circuit board. An external signal may be applied to the junction portion. If the lead frame unit is used in the stacked semiconductor package, the outer lead and a dummy outer lead in the stacked semiconductor package may have substantially the same shape.

Abstract: Provided are a semiconductor package and a semiconductor package module including the same. The semiconductor package may include a plurality of semiconductor chips, a plurality of leads connected to pads of the semiconductor chips and externally exposed, wherein the plurality of leads may be classified into a plurality of pin groups, and the plurality of semiconductor chips may be classified into a plurality of chip groups, and the pads of the semiconductor chips of like chip groups may be connected to the leads of like pin groups.

Abstract: An inexpensive method of manufacturing a semiconductor package using a redistribution substrate that is relatively thin. The method includes: attaching a semiconductor chip to a redistribution substrate; attaching the redistribution substrate to which the semiconductor chip is attached to a printed circuit board; removing a support substrate of the redistribution substrate; forming via holes to expose a bond pad of the semiconductor chip and a bond finger of the printed circuit board; and filling the via holes with a conductive material. Meanwhile, a redistribution substrate to which at least one other semiconductor chip may be mounted on the redistribution substrate.

Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

Abstract: A semiconductor device includes a semiconductor package, a circuit board and an interval maintaining member. The semiconductor package has a body and a lead protruded from the body. The circuit board has a first land electrically connected to the lead. The interval maintaining member is interposed between the circuit board and the body. The interval maintaining member maintains an interval between the lead and the first land. Thus, an interval between the lead and the land is uniformly maintained, so that a thermal and/or mechanical reliability of the semiconductor device is improved.

Abstract: A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance.