Abstract: A radio frequency (RF) receiver and a method of receiving an RF signal are provided. The RF receiver includes a low-noise amplifying unit which amplifies a received signal while restricting out-of-band interference of the received signal, a sampling unit which performs sampling to convert the amplified signal to a discrete time domain signal, a frequency translation unit which down-converts the discrete time domain signal into a frequency band that enables the discrete time domain signal to be converted into a digital signal and restricts interference from a frequency within an aliasing band according to a sampling frequency, an anti-aliasing filtering unit which prevents aliasing from the down-converted signal, a clock unit which provides the sampling unit, the frequency translation unit, and the anti-aliasing filtering unit with sampling frequencies, and an analog-digital-converter which converts the converted signal into the digital signal.

Abstract: A discrete time filter includes a plurality of sampling cells and a first dummy sampling cell. Each of the sampling cells performs a current mode sampling operation based on current input to an input terminal in response to a corresponding one of a plurality of sampling clock signals and is reset in response to a corresponding one of the plurality of sampling clock signals and a first dummy sampling clocks. The first dummy sampling cell alternately performs with the first sampling cell the current mode sampling operation based on current input to the input terminal in response to the first dummy sampling clock signal and is alternately reset with the first sampling cell in response to the first sampling clock signal.

Abstract: A transmitter and a signal amplifier are provided. The signal amplifier includes a digital-to-analog converter converting an input digital signal into an analog signal, a local oscillator signal generator outputting in-phase and quadrature-phase oscillator signals, a first mixer mixing the analog signal with the in-phase local oscillator signal to output an in-phase high frequency signal, a second mixer mixing the analog signal with the quadrature-phase local oscillator signal to output a quadrature-phase high frequency signal, a main amplifier amplifying the in-phase high frequency signal output from the first mixer, and an auxiliary amplifier amplifying the quadrature-phase high frequency signal output from the second mixer.

Abstract: A track-and-hold circuit includes a bootstrapped clock generator and a track-and-hold unit. The bootstrapped clock generator receives an input voltage signal and generates a sampling control signal having a voltage level lower than or equal to a level of a power supply voltage by maintaining an initial level of a boost capacitor voltage at a level lower than the level of the power supply voltage. The boost capacitor voltage is a voltage that is charged across a boost capacitor included in the bootstrapped clock generator and the sampling control signal is generated based on a clock signal. The track-and-hold unit samples and holds the input voltage signal in response to the sampling control signal to generate a sampled signal.

Abstract: A folding analog-to-digital converter including: a reference voltage generator, a track-and-hold circuit and a first pre-amplification circuit. The reference voltage generator generates a plurality of reference voltages. The track-and-hold circuit generates a sampling control signal having a voltage level lower than or equal to a level of a power supply voltage by maintaining an initial level of a boost capacitor voltage at a level lower than a level of a power supply voltage, and samples and holds an input voltage signal in response to the generated sampling control signal to generate a sampled signal. The first pre-amplification circuit amplifies each of voltage differences between the sampled signal and each of the plurality of reference voltages.

Abstract: A digital phase detector includes a quantization unit that quantizes a frequency of a reference signal to generate reference delay information and reference integer phase information, and quantizes a frequency of an oscillation signal to generate oscillation delay information and oscillation integer phase information. A first conversion unit converts the frequency of the reference signal into reference frequency information based upon the reference delay information and the reference integer phase information. A second conversion unit converts the frequency of the oscillation signal into oscillation frequency information based upon the oscillation delay information and the oscillation integer phase information. A calculation unit converts the reference frequency information and the oscillation frequency information into first and second phase information, respectively, and outputs a digital phase difference between the first phase information and the second phase information.

Abstract: A radio frequency identification (RFID) reader is provided, having a transmitting circuit that generates a transmitted signal to operate an RFID tag, a receiving circuit that receives a received signal including a tag signal from the RFID tag and a transmission carrier leakage signal leaking from the transmitting circuit, and a leakage removing circuit that senses a phase and amplitude of the transmission carrier leakage signal inputted to the receiving circuit, converts the transmitted signal from the transmitting circuit into a signal having a phase opposite to that of the transmission carrier leakage signal and an amplitude equal to that of the transmission carrier leakage signal, and synthesizes the converted signal and the received signal inputted to the receiving circuit.

Abstract: An inductor circuit includes a pair of inductors connected in parallel with each other and a switch for turning on and off electric power to one of the pair of inductors. The inductance of the inductor circuit can be varied and the quality factor Q can be improved. Further, RF circuits employing the inductor circuit can generate an intended operating frequency.

Abstract: A communication apparatus and a low noise amplifying method. The communication apparatus includes a gain adjusting unit to adjust a gain of an input signal; a combiner to generate an output signal using the signal gain-adjusted at the gain adjusting unit; and a feedback unit which provides a feedback signal, which is generated using the output signal generated at the combiner, to an input stage. Accordingly, various frequency bands defined in the wireless standards can be supported. Since the load impedance is generated without resistance, the manufacturing cost and the product size can be reduced.

Abstract: A variable inductor is provided, which includes a first lead having both ends to receive a pair of difference signals, a second lead having both ends to receive a pair of the difference signals, and a switch selectively supplying a pair of the difference signals to the second lead by turning on/off according to a control signal. Accordingly, a variable inductor can be implemented that is compact and maximizes the variation rate of inductance.

Abstract: A radio frequency (RF) filter is provided which includes a band pass filter unit and an amplifying unit. If a signal having a frequency in a first band is input, the RF filter performs band pass filtering, and if a signal having a frequency in a second band is input, the RF filter performs an amplifying process. The RF filter can be used for various RF signal processing devices, such as digital broadcast receiving tuners.

Abstract: An inductor circuit includes a pair of inductors connected in parallel with each other and a switch for turning on and off electric power to one of the pair of inductors. The inductance of the inductor circuit can be varied and the quality factor Q can be improved. Further, RF circuits employing the inductor circuit can generate an intended operating frequency.

Abstract: A track-and-hold circuit includes a bootstrapped clock generator and a track-and-hold unit. The bootstrapped clock generator receives an input voltage signal and generates a sampling control signal having a voltage level lower than or equal to a level of a power supply voltage by maintaining an initial level of a boost capacitor voltage at a level lower than the level of the power supply voltage. The boost capacitor voltage is a voltage that is charged across a boost capacitor included in the bootstrapped clock generator and the sampling control signal is generated based on a clock signal. The track-and-hold unit samples and holds the input voltage signal in response to the sampling control signal to generate a sampled signal.

Abstract: A folding analog-to-digital converter including: a reference voltage generator, a track-and-hold circuit and a first pre-amplification circuit. The reference voltage generator generates a plurality of reference voltages. The track-and-hold circuit generates a sampling control signal having a voltage level lower than or equal to a level of a power supply voltage by maintaining an initial level of a boost capacitor voltage at a level lower than a level of a power supply voltage, and samples and holds an input voltage signal in response to the generated sampling control signal to generate a sampled signal. The first pre-amplification circuit amplifies each of voltage differences between the sampled signal and each of the plurality of reference voltages.

Abstract: A discrete time filter includes a plurality of sampling cells and a first dummy sampling cell. Each of the sampling cells performs a current mode sampling operation based on current input to an input terminal in response to a corresponding one of a plurality of sampling clock signals and is reset in response to a corresponding one of the plurality of sampling clock signals and a first dummy sampling clocks. The first dummy sampling cell alternately performs with the first sampling cell the current mode sampling operation based on current input to the input terminal in response to the first dummy sampling clock signal and is alternately reset with the first sampling cell in response to the first sampling clock signal.

Abstract: An N×N multiple-input multiple-output (MIMO) transceiver is provided. The transceiver includes a plurality of transceivers, each including at least one transceiver circuit; an oscillation unit which is configured to generate a differential signal which is supplied to the at least one transceiver circuit; a plurality of buffers, which are mounted in a bypass line between the at least one transceiver circuit and the oscillation unit and are configured to amplify and bypass the differential signal or input and amplify the differential signal; and a buffer control unit which is configured to control the plurality of buffers to bypass or input the differential signal.

Abstract: An RF receiver and an RF receiving method are provided using a baseband signal in which a DC offset is removed. In the RF receiver, a noise phase removing unit generates a phase controlled local signal PLOQ in which a phase of a Q signal of a local signal LOQ is controlled, by synthesizing a received RF signal RXIN and the Q signal of the local signal LOQ. A down converter generates a signal in which a DC offset from noise introduced into the received RF signal RXIN is removed, when synthesizing the received RF signal RXIN and the phase controlled local signal PLOQ for frequency-down conversion.

Abstract: A mobile radio frequency identification (mRFID) reader having a receiving circuit is provided. The receiving circuit includes a local oscillator which generates a carrier signal at a predetermined frequency band; a mixer which mixes a tag signal received from a tag with the carrier signal, to lower a frequency of the tag signal; a phase adjusting block which adjusts a phase of the carrier signal by determining a phase of the tag signal; and a control block which processes the tag signal through a series of operations, and controls an operation of the phase adjusting block to compensate for a phase delay of the tag signal according to an output of the processed tag signal. Because the mRFID reader can be provided as small as a half size of a related art reader, a mobile communication terminal accommodating the mRFID reader can be compact-sized. Additionally, because the number of components for the receiving circuit decreases, not only the power consumption but also the unit price can be reduced.

Abstract: A low noise amplifier is provided. The low noise amplifier includes: a low noise amplifying unit amplifying an input signal; a harmonic and noise generating unit disposed in an input terminal of the low noise amplifying unit, for generating a compensating signal for compensating for an intermodulation distortion signal and a thermal noise signal of the input signal to the low noise amplifying unit; and a load unit outputting the amplified input signal generated by the low noise amplifying unit.

Abstract: A digital phase detector includes a quantization unit that quantizes a frequency of a reference signal to generate reference delay information and reference integer phase information, and quantizes a frequency of an oscillation signal to generate oscillation delay information and oscillation integer phase information. A first conversion unit converts the frequency of the reference signal into reference frequency information based upon the reference delay information and the reference integer phase information. A second conversion unit converts the frequency of the oscillation signal into oscillation frequency information based upon the oscillation delay information and the oscillation integer phase information. A calculation unit converts the reference frequency information and the oscillation frequency information into first and second phase information, respectively, and outputs a digital phase difference between the first phase information and the second phase information.