Patents by Inventor Heungkyu Park

Heungkyu Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8816417
    Abstract: A semiconductor device includes a back bias dielectric including a negative fixed charge, a gate electrode overlapping the back bias dielectric, a semiconductor layer disposed between the gate electrode and the back bias dielectric, and a gate dielectric disposed between the semiconductor layer and the gate electrode, wherein the negative fixed charge accumulates holes at a surface of the semiconductor layer facing the back bias dielectric.
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sanghun Jeon, Jong-Hyuk Kang, Heungkyu Park, Jongwook Lee
  • Patent number: 8294209
    Abstract: A semiconductor memory device includes a plurality of active pillars protruding from a semiconductor substrate, a first gate electrode disposed on at least one sidewall of the active pillar, a first gate insulating layer being disposed between the active pillar and the first gate electrode, a second gate electrode disposed on at least one sidewall of the active pillar over the first gate electrode, a second gate insulating layer being disposed between the active pillar and the second gate electrode, first and second body regions in the active pillar adjacent to respective first and second respective electrodes, and first through third source/drain regions in the active pillar arranged alternately with the first and second body regions.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 23, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sanghun Jeon, Jongwook Lee, Jong-Hyuk Kang, Heungkyu Park
  • Publication number: 20100213521
    Abstract: A semiconductor device includes a back bias dielectric including a negative fixed charge, a gate electrode overlapping the back bias dielectric, a semiconductor layer disposed between the gate electrode and the back bias dielectric, and a gate dielectric disposed between the semiconductor layer and the gate electrode, wherein the negative fixed charge accumulates holes at a surface of the semiconductor layer facing the back bias dielectric.
    Type: Application
    Filed: February 25, 2010
    Publication date: August 26, 2010
    Inventors: Sanghun Jeon, Jong-Hyuk Kang, Heungkyu Park, Jongwook Lee
  • Publication number: 20100213524
    Abstract: A semiconductor memory device includes a plurality of active pillars protruding from a semiconductor substrate, a first gate electrode disposed on at least one sidewall of the active pillar, a first gate insulating layer being disposed between the active pillar and the first gate electrode, a second gate electrode disposed on at least one sidewall of the active pillar over the first gate electrode, a second gate insulating layer being disposed between the active pillar and the second gate electrode, first and second body regions in the active pillar adjacent to respective first and second respective electrodes, and first through third source/drain regions in the active pillar arranged alternately with the first and second body regions.
    Type: Application
    Filed: February 24, 2010
    Publication date: August 26, 2010
    Inventors: Sanghun Jeon, Jongwook Lee, Jong-Hyuk Kang, Heungkyu Park