Patents by Inventor Heung-Soo Lim
Heung-Soo Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9478298Abstract: A method of reading data in a memory system including a non-volatile memory device, includes reading first data stored in a first block using a first read scheme capable of detecting/correcting an error in the first data, and upon determining an uncorrected error in the first data, setting the first block as a first temporary bad block and reading second data stored in the first temporary bad block using a second read scheme different from the first read scheme.Type: GrantFiled: June 23, 2014Date of Patent: October 25, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Ho Shin, Heung-Soo Lim
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Publication number: 20140380129Abstract: Provided is a method of reading data in a memory system including a non-volatile memory device. The method includes reading first data stored in a first block using a first read scheme capable of detecting/correcting an error in the first data, and upon determining an uncorrected error in the first data, setting the first block as a first temporary bad block and reading second data stored in the first temporary bad block using a second read scheme different from the first read scheme.Type: ApplicationFiled: June 23, 2014Publication date: December 25, 2014Inventors: HYUN-HO SHIN, HEUNG-SOO LIM
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Patent number: 8180976Abstract: A nonvolatile memory device includes a memory cell array, a data scanning unit, and a program unit. The memory cell array includes a plurality of memory cells, where each of the memory cells is programmable to store data have a first logic value or a second logic value. The data scanning unit is configured to search among a plurality of data to be programmed in the memory cells to identify data having the second logic value. The program unit is configured to group the identified data having the second logic value, and to program at least a portion of the group of identified data at a same time into the memory cells.Type: GrantFiled: November 5, 2004Date of Patent: May 15, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Yong Jeong, Heung-soo Lim
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Patent number: 7742341Abstract: A NOR flash memory device and related programming method are disclosed. The programming method includes programming data in a memory cell and, during a program verification operation, controlling the supply of current from a sense amplifier to the memory cell in relation to the value of the programmed data. Wherein a program verification operation is indicated, current is provided from the sense amplifier to the memory cell. Where a program verification operation is not indicated, current is cut off from the sense amplifier.Type: GrantFiled: August 12, 2008Date of Patent: June 22, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Bo-Geun Kim, Heung-Soo Lim, Jae-Woo Im
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Nonvolatile memory devices capable of reducing data programming time and methods of driving the same
Patent number: 7668015Abstract: In a method of driving a nonvolatile memory device a first data state is determined from among the plurality of data states. The number of simultaneously programmed bits is set according to the determined first data state and a scanning operation is performed on data input from an external device to search data bits to be programmed. The searched data bits are programmed in response to the number of simultaneously programmed bits. The number of simultaneously programmed bits corresponding to the first data state is different from a number of simultaneously programmed bits corresponding to at least a second of the plurality of data states.Type: GrantFiled: December 27, 2007Date of Patent: February 23, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-phil Kong, Heung-soo Lim, Jae-yong Jeong, Chi-weon Yoon -
Patent number: 7599222Abstract: Disclosed is a semiconductor memory device which is operable a pipelined-buffer programming and includes a cell array including a plurality of memory cells, a write driver circuit divided into a plurality of write units, each write unit programming memory cells with a first data, a sense amplifier circuit divided into plurality of read units of the same number as the plurality of write units, each read unit sensing bit lines of the cell array during a program verify operation, a selection circuit for selecting one of the write units and one of the read units in response to a column address and a data input circuit for providing the first data to the selected write unit during a program operation and for receiving verifying data from the selected read unit during the program verify operation.Type: GrantFiled: September 14, 2006Date of Patent: October 6, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Chi-Weon Yoon, Heung-Soo Lim
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Patent number: 7539077Abstract: A flash memory device includes a memory cell array with multiple memory cells, a data buffer, a write driver and a controller. The data buffer stores data to be programmed into the memory cells, the data having sequential data addresses. The write driver programs the data stored in the data buffer into the memory cells during one programming operation. The controller controls operations of the data buffer and the write driver, and performs flexible mapping between addresses of the data buffer and the data addresses based on a first address of the data.Type: GrantFiled: July 11, 2007Date of Patent: May 26, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Chi-Weon Yoon, Heung-Soo Lim
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Patent number: 7480182Abstract: A program operation for a NOR flash memory device is verified by programming data in a memory cell, performing a dummy verify operation on the memory cell, and performing a program verify operation on the memory cell based on a result of the dummy verify operation.Type: GrantFiled: July 13, 2006Date of Patent: January 20, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Bo-Geun Kim, Heung-Soo Lim, Jae-Woo Lim
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Publication number: 20080310227Abstract: A NOR flash memory device and related programming method are disclosed. The programming method includes programming data in a memory cell and, during a program verification operation, controlling the supply of current from a sense amplifier to the memory cell in relation to the value of the programmed data. Wherein a program verification operation is indicated, current is provided from the sense amplifier to the memory cell. Where a program verification operation is not indicated, current is cut off from the sense amplifier.Type: ApplicationFiled: August 12, 2008Publication date: December 18, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Bo-Geun KIM, Heung-Soo LIM, Jae-Woo IM
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Patent number: 7457165Abstract: Disclosed are a non-volatile memory device and a method of programming the same. The method comprises applying a wordline voltage, a bitline voltage, and a bulk voltage to a memory cell during a plurality of program loops. In cases where the bitline voltage falls below a first predetermined detection voltage during a current program loop, or the bulk voltage becomes higher than a second predetermined detection voltage, the same wordline voltage is used in the current programming loop and a next program loop following the current program loop. Otherwise, the wordline voltage is incremented by a predetermined amount before the next programming loop.Type: GrantFiled: September 14, 2007Date of Patent: November 25, 2008Assignee: Samsung Electroincs Co., Ltd.Inventors: Jae-Yong Jeong, Heung-Soo Lim
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Patent number: 7433244Abstract: An erase operation for a flash memory device includes identifying a sector group including a plurality of sectors based on an address, simultaneously pre-programming the sectors in the sector group, simultaneously erasing the sectors the sector group, and simultaneously post-programming the sectors in the sector group.Type: GrantFiled: August 9, 2006Date of Patent: October 7, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Chi-Weon Yoon, Heung-Soo Lim
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Patent number: 7426143Abstract: A NOR flash memory device and related programming method are disclosed. The programming method includes programming data in a memory cell and, during a program verification operation, controlling the supply of current from a sense amplifier to the memory cell in relation to the value of the programmed data. Wherein a program verification operation is indicated, current is provided from the sense amplifier to the memory cell. Where a program verification operation is not indicated, current is cut off from the sense amplifier.Type: GrantFiled: April 21, 2006Date of Patent: September 16, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Bo-Geun Kim, Heung-Soo Lim, Jae-Woo Im
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Nonvolatile memory devices capable of reducing data programming time and methods of driving the same
Publication number: 20080192540Abstract: In a method of driving a nonvolatile memory device a first data state is determined from among the plurality of data states. The number of simultaneously programmed bits is set according to the determined first data state and a scanning operation is performed on data input from an external device to search data bits to be programmed. The searched data bits are programmed in response to the number of simultaneously programmed bits. The number of simultaneously programmed bits corresponding to the first data state is different from a number of simultaneously programmed bits corresponding to at least a second of the plurality of data states.Type: ApplicationFiled: December 27, 2007Publication date: August 14, 2008Inventors: Jae-Phil Kong, Heung-soo Lim, Jae-yong Jeong, Chi-weon Yoon -
Patent number: 7405977Abstract: A flash memory device comprises an array of memory cells arranged in rows and columns and a word line voltage generating circuit adapted to generate a plurality of read voltages at the same time during a multi-bit read operation. The device further comprises a row selecting circuit adapted to select one of the rows and drive the selected row with a word line voltage, and voltage lines transmitting the respective read voltages to the row selecting circuit as the word line voltage. The read voltages are supplied to the respective voltage lines before starting read periods of the multi-bit read operation.Type: GrantFiled: June 26, 2006Date of Patent: July 29, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Doo-Sub Lee, Heung-Soo Lim
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Patent number: 7352623Abstract: A NOR flash memory device includes a multi level memory cell coupled to a bit line configured to be sensed in response to a word line voltage, and a discharge circuit configured to discharge the bit line when the multi level memory cell is sensed as an on cell.Type: GrantFiled: December 29, 2005Date of Patent: April 1, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Bo-Geun Kim, Heung-Soo Lim, Jae-Woo Lim
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Publication number: 20080043536Abstract: Disclosed are a non-volatile memory device and a method of programming the same. The method comprises applying a wordline voltage, a bitline voltage, and a bulk voltage to a memory cell during a plurality of program loops. In cases where the bitline voltage falls below a first predetermined detection voltage during a current program loop, or the bulk voltage becomes higher than a second predetermined detection voltage, the same wordline voltage is used in the current programming loop and a next program loop following the current program loop. Otherwise, the wordline voltage is incremented by a predetermined amount before the next programming loop.Type: ApplicationFiled: September 14, 2007Publication date: February 21, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Yong JEONG, Heung-Soo LIM
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Publication number: 20080031050Abstract: A flash memory device includes a memory cell array with multiple memory cells, a data buffer, a write driver and a controller. The data buffer stores data to be programmed into the memory cells, the data having sequential data addresses. The write driver programs the data stored in the data buffer into the memory cells during one programming operation. The controller controls operations of the data buffer and the write driver, and performs flexible mapping between addresses of the data buffer and the data addresses based on a first address of the data.Type: ApplicationFiled: July 11, 2007Publication date: February 7, 2008Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chi-Weon Yoon, Heung-Soo Lim
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Patent number: 7286413Abstract: Disclosed are a non-volatile memory device and a method of programming the same. The method comprises applying a wordline voltage, a bitline voltage, and a bulk voltage to a memory cell during a plurality of program loops. In cases where the bitline voltage falls below a first predetermined detection voltage during a current program loop, or the bulk voltage becomes higher than a second predetermined detection voltage, the same wordline voltage is used in the current programming loop and a next program loop following the current program loop. Otherwise, the wordline voltage is incremented by a predetermined amount before the next programming loop.Type: GrantFiled: October 25, 2005Date of Patent: October 23, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Yong Jeong, Heung-Soo Lim
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Publication number: 20070150646Abstract: Disclosed is a semiconductor memory device which is operable a pipelined-buffer programming and includes a cell array including a plurality of memory cells, a write driver circuit divided into a plurality of write units, each write unit programming memory cells with a first data, a sense amplifier circuit divided into plurality of read units of the same number as the plurality of write units, each read unit sensing bit lines of the cell array during a program verify operation, a selection circuit for selecting one of the write units and one of the read units in response to a column address and a data input circuit for providing the first data to the selected write unit during a program operation and for receiving verifying data from the selected read unit during the program verify operation.Type: ApplicationFiled: September 14, 2006Publication date: June 28, 2007Inventors: Chi-Weon Yoon, Heung-Soo Lim
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Publication number: 20070147136Abstract: An erase operation for a flash memory device includes identifying a sector group including a plurality of sectors based on an address, simultaneously pre-programming the sectors in the sector group, simultaneously erasing the sectors the sector group, and simultaneously post-programming the sectors in the sector group.Type: ApplicationFiled: August 9, 2006Publication date: June 28, 2007Inventors: Chi-Weon Yoon, Heung-Soo Lim