Patents by Inventor Heung-Soo Rhee

Heung-Soo Rhee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6346861
    Abstract: A phase locked loop (PLL) is use in a radio communication system such as a frequency mixer, a carrier frequency and the like. The phase locked loop (PLL) includes a phase/frequency detector for comparing a phase/frequency of a reference signal and a feedback signal. The phase/frequency detector includes: a NAND gate logic circuit for NANDing a first signal and a second signal to output a NANDed signal; a first latch unit for latching the NANDed signal and outputting the first signal in response to a reference frequency; and a second latch unit for latching the NANDed signal and outputting the second signal in response to a feedback frequency. The phase locked loop (PLL) further includes a filter controller for changing a bandwidth of a low pass filter in response to an output signal of the phase/frequency detector.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: February 12, 2002
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Young-Ho Kim, Sang-Heung Lee, Heung-Soo Rhee, Jin-Yeong Kang
  • Publication number: 20010052822
    Abstract: A phase locked loop (PLL) is used in a radio communication system such as a frequency mixer, a carrier frequency and the like. The phase locked loop (PLL) includes a phase/frequency detector for comparing a phase/frequency of a reference signal and a feedback signal. The phase/frequency detector includes: a NAND gate logic circuit for NANDing a first signal and a second signal to output a NANDed signal; a first latch unit for latching the NANDed signal and outputting the first signal in response to a reference frequency; and a second latch unit for latching the NANDed signal and outputting the second signal in response to a feedback frequency. The phase locked loop (PLL) further includes a filter controller for changing a bandwidth of a low pass filter in response to an output signal of the phase/frequency detector.
    Type: Application
    Filed: December 7, 2000
    Publication date: December 20, 2001
    Inventors: Young-Ho Kim, Sang-Heung Lee, Heung-Soo Rhee, Jin-Yeong Kang
  • Patent number: 6093599
    Abstract: The present invention relates to a on silicon substrate, specifically to an inductor device and manufacturing method thereof for enhancing the quality factor of the inductor by disposing trenches on a silicon substratre, and by filling the inside of the trenches with polycrystalline polysilicon not doped with impurities. The present invention provides an inductor device and a manufacturing method thereof which can improve the quality factor by increasing resistance of the substrate by forming deep trenches disposed in specific patterns on a low-resistance silicon substrate and filling polycrystalline silicon not doped with impurities, and by reducing parasitic capacitance between the inductor and the silicon substrate.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: July 25, 2000
    Assignee: Electronics and Telecomunications Research Institute
    Inventors: Jin Hyo Lee, Heung Soo Rhee, Hyun Kyu Yu, Bo Woo Kim, Kee Soo Nam