Patents by Inventor Heung-Suk Oh

Heung-Suk Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230194975
    Abstract: An optical proximity correction system and an operating method are provided. Provided is an optical proximity correction system comprising, a plurality of patch blocks which include a plurality of patches including a segment information table, a plurality of slave devices which receive the segment information table from the plurality of patch blocks to generate a minimum patch table, and a master device which receives the minimum patch table from the plurality of slave devices, generates a segment average calculation table, and performs an optical proximity correction on the patches recorded in the segment average calculation table.
    Type: Application
    Filed: July 26, 2022
    Publication date: June 22, 2023
    Inventors: Hee-Jun LEE, Sang Wook KIM, Heung Suk OH, Jee Eun JUNG
  • Patent number: 10991692
    Abstract: A semiconductor device comprises a first fin-type pattern comprising a first long side extending in a first direction, and a first short side extending in a second direction. A second fin-type pattern is arranged substantially parallel to the first fin-type pattern. A first gate electrode intersects the first fin-type pattern and the second fin-type pattern. The second fin-type pattern comprises a protrusion portion that protrudes beyond the first short side of the first fin-type pattern. The first gate electrode overlaps with an end portion of the first fin-type pattern that comprises the first short side of the first fin-type pattern. At least part of a first sidewall of the first fin-type pattern that defines the first short side of the first fin-type pattern is defined by a first trench having a first depth. The first trench directly adjoins a second trench having a second, greater, depth.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: April 27, 2021
    Inventors: Myoung Ho Kang, Gyeongseop Kim, Jeong Lim Kim, Jae Myoung Lee, Heung Suk Oh, Yeon Hwa Lim, Joong Won Jeon, Sung Min Kim
  • Publication number: 20200235097
    Abstract: A semiconductor device comprises a first fin-type pattern comprising a first long side extending in a first direction, and a first short side extending in a second direction. A second fin-type pattern is arranged substantially parallel to the first fin-type pattern. A first gate electrode intersects the first fin-type pattern and the second fin-type pattern. The second fin-type pattern comprises a protrusion portion that protrudes beyond the first short side of the first fin-type pattern. The first gate electrode overlaps with an end portion of the first fin-type pattern that comprises the first short side of the first fin-type pattern. At least part of a first sidewall of the first fin-type pattern that defines the first short side of the first fin-type pattern is defined by a first trench having a first depth. The first trench directly adjoins a second trench having a second, greater, depth.
    Type: Application
    Filed: April 6, 2020
    Publication date: July 23, 2020
    Inventors: Myoung Ho Kang, Gyeongseop Kim, Jeong Lim Kim, Jae Myoung Lee, Heung Suk Oh, Yeon Hwa Lim, Joong Won Jeon, Sung Min Kim
  • Patent number: 10643998
    Abstract: A semiconductor device comprises a first fin-type pattern comprising a first long side extending in a first direction, and a first short side extending in a second direction. A second fin-type pattern is arranged substantially parallel to the first fin-type pattern. A first gate electrode intersects the first fin-type pattern and the second fin-type pattern. The second fin-type pattern comprises a protrusion portion that protrudes beyond the first short side of the first fin-type pattern. The first gate electrode overlaps with an end portion of the first fin-type pattern that comprises the first short side of the first fin-type pattern. At least part of a first sidewall of the first fin-type pattern that defines the first short side of the first fin-type pattern is defined by a first trench having a first depth. The first trench directly adjoins a second trench having a second, greater, depth.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: May 5, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myoung Ho Kang, Gyeongseop Kim, Jeong Lim Kim, Jae Myoung Lee, Heung Suk Oh, Yeon Hwa Lim, Joong Won Jeon, Sung Min Kim
  • Publication number: 20200043922
    Abstract: A semiconductor device comprises a first fin-type pattern comprising a first long side extending in a first direction, and a first short side extending in a second direction. A second fin-type pattern is arranged substantially parallel to the first fin-type pattern. A first gate electrode intersects the first fin-type pattern and the second fin-type pattern. The second fin-type pattern comprises a protrusion portion that protrudes beyond the first short side of the first fin-type pattern. The first gate electrode overlaps with an end portion of the first fin-type pattern that comprises the first short side of the first fin-type pattern. At least part of a first sidewall of the first fin-type pattern that defines the first short side of the first fin-type pattern is defined by a first trench having a first depth. The first trench directly adjoins a second trench having a second, greater, depth.
    Type: Application
    Filed: October 4, 2019
    Publication date: February 6, 2020
    Inventors: Myoung Ho Kang, Gyeongseop Kim, Jeong Lim Kim, Jae Myoung Lee, Heung Suk Oh, Yeon Hwa Lim, Joong Won Jeon, Sung Min Kim
  • Patent number: 10475789
    Abstract: A semiconductor device comprises a first fin-type pattern comprising a first long side extending in a first direction, and a first short side extending in a second direction. A second fin-type pattern is arranged substantially parallel to the first fin-type pattern. A first gate electrode intersects the first fin-type pattern and the second fin-type pattern. The second fin-type pattern comprises a protrusion portion that protrudes beyond the first short side of the first fin-type pattern. The first gate electrode overlaps with an end portion of the first fin-type pattern that comprises the first short side of the first fin-type pattern. At least part of a first sidewall of the first fin-type pattern that defines the first short side of the first fin-type pattern is defined by a first trench having a first depth. The first trench directly adjoins a second trench having a second, greater, depth.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: November 12, 2019
    Assignee: Samsung Electroncis Co., Ltd.
    Inventors: Myoung Ho Kang, Gyeongseop Kim, Jeong Lim Kim, Jae Myoung Lee, Heung Suk Oh, Yeon Hwa Lim, Joong Won Jeon, Sung Min Kim
  • Publication number: 20180286859
    Abstract: A semiconductor device comprises a first fin-type pattern comprising a first long side extending in a first direction, and a first short side extending in a second direction. A second fin-type pattern is arranged substantially parallel to the first fin-type pattern. A first gate electrode intersects the first fin-type pattern and the second fin-type pattern. The second fin-type pattern comprises a protrusion portion that protrudes beyond the first short side of the first fin-type pattern. The first gate electrode overlaps with an end portion of the first fin-type pattern that comprises the first short side of the first fin-type pattern. At least part of a first sidewall of the first fin-type pattern that defines the first short side of the first fin-type pattern is defined by a first trench having a first depth. The first trench directly adjoins a second trench having a second, greater, depth.
    Type: Application
    Filed: December 11, 2017
    Publication date: October 4, 2018
    Inventors: Myoung Ho Kang, Gyeongseop Kim, Jeong Lim Kim, Jae Myoung Lee, Heung Suk Oh, Yeon Hwa Lim, Joong Won Jeon
  • Patent number: 9529960
    Abstract: A method of providing a photolithography pattern can be provided by identifying at least one weak feature from among a plurality of features included in a photolithography pattern based on a feature parameter that is compared to a predetermined identification threshold value for the feature parameter. A first region of the weak feature can be classified as a first dosage region and a second region of the weak feature can be classified as a second dosage region. Related methods and apparatus are also disclosed.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: December 27, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Choi, Heung-suk Oh, Sin-jeung Park, Rae-won Yi
  • Publication number: 20150220679
    Abstract: A method of providing a photolithography pattern can be provided by identifying at least one weak feature from among a plurality of features included in a photolithography pattern based on a feature parameter that is compared to a predetermined identification threshold value for the feature parameter, A first region of the weak feature can be classified as a first dosage region and a second region of the weak feature can be classified as a second dosage region. Related methods and apparatus are also disclosed.
    Type: Application
    Filed: April 6, 2015
    Publication date: August 6, 2015
    Inventors: Jin Choi, Heung-suk Oh, Sin-jeung Park, Rae-won Yi
  • Patent number: 9017904
    Abstract: A method of providing a photolithography pattern can be provided by identifying at least one weak feature from among a plurality of features included in a photolithography pattern based on a feature parameter that is compared to a predetermined identification threshold value for the feature parameter. A first region of the weak feature can be classified as a first dosage region and a second region of the weak feature can be classified as a second dosage region. Related methods and apparatus are also disclosed.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: April 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin Choi, Heung-Suk Oh, Sin-jeung Park, Rae-won Yi
  • Publication number: 20140045334
    Abstract: A method of providing a photolithography pattern can be provided by identifying at least one weak feature from among a plurality of features included in a photolithography pattern based on a feature parameter that is compared to a predetermined identification threshold value for the feature parameter. A first region of the weak feature can be classified as a first dosage region and a second region of the weak feature can be classified as a second dosage region. Related methods and apparatus are also disclosed.
    Type: Application
    Filed: July 25, 2013
    Publication date: February 13, 2014
    Inventors: Jin Choi, Heung-Suk Oh, Sin-jeung Park, Rae-won Yi