Patents by Inventor Hey Lee
Hey Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10626303Abstract: Provided are an adhesive sheet including a base layer, an adhesive layer, and a release paper, which are sequentially disposed, the adhesive layer being attached to a target for attachment after the release paper is removed, wherein the adhesive layer includes a first adhesive layer, which is attached to one surface of the base layer, and second adhesive layers attached to the first adhesive layer and to the release paper, the second adhesive layers being arranged so as to form a pattern, wherein the second adhesive layers remain attached to the target for attachment, wherein a film is attached to the target for attachment without requiring the film to be wet with water, and wherein an air layer or air bubbles are discharged from the adhesive sheet through paths that serve to discharge the air bubbles, thereby preventing a reduction of initial adhesive force, solving a problem of freezing, and achieving easy attachment, and a method of manufacturing the same.Type: GrantFiled: December 27, 2017Date of Patent: April 21, 2020Assignee: SMART CO., LTD.Inventors: Sung Je Kim, Wang Je Kim, Jung Hey Lee
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Patent number: 10256251Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.Type: GrantFiled: October 24, 2017Date of Patent: April 9, 2019Assignee: SK hynix Inc.Inventors: Eun-Seok Choi, Sa-Yong Shim, In-Hey Lee, Sung-Wook Jung, Jung-Seok Oh
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Publication number: 20190077995Abstract: Provided are an adhesive sheet including a base layer, an adhesive layer, and a release paper, which are sequentially disposed, the adhesive layer being attached to a target for attachment after the release paper is removed, wherein the adhesive layer includes a first adhesive layer, which is attached to one surface of the base layer, and second adhesive layers attached to the first adhesive layer and to the release paper, the second adhesive layers being arranged so as to form a pattern, wherein the second adhesive layers remain attached to the target for attachment, wherein a film is attached to the target for attachment without requiring the film to be wet with water, and wherein an air layer or air bubbles are discharged from the adhesive sheet through paths that serve to discharge the air bubbles, thereby preventing a reduction of initial adhesive force, solving a problem of freezing, and achieving easy attachment, and a method of manufacturing the same.Type: ApplicationFiled: December 27, 2017Publication date: March 14, 2019Inventors: Sung Je KIM, Wang Je KIM, Jung Hey LEE
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Publication number: 20180047748Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.Type: ApplicationFiled: October 24, 2017Publication date: February 15, 2018Inventors: Eun-Seok CHOI, Sa-Yong SHIM, In-Hey LEE, Sung-Wook JUNG, Jung-Seok OH
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Patent number: 9831264Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.Type: GrantFiled: March 1, 2016Date of Patent: November 28, 2017Assignee: SK Hynix Inc.Inventors: Eun-Seok Choi, Sa-Yong Shim, In-Hey Lee, Sung-Wook Jung, Jung-Seok Oh
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Publication number: 20160181275Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.Type: ApplicationFiled: March 1, 2016Publication date: June 23, 2016Inventors: Eun-Seok CHOI, Sa-Yong SHIM, In-Hey LEE, Sung-Wook JUNG, Jung-Seok OH
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Patent number: 9306040Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.Type: GrantFiled: July 17, 2013Date of Patent: April 5, 2016Assignee: SK Hynix Inc.Inventors: Eun-Seok Choi, Sa-Yong Shim, In-Hey Lee, Sung-Wook Jung, Jung-Seok Oh
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Patent number: 9023702Abstract: A nonvolatile memory device may include a plurality of channel layers protruded substantially perpendicularly over a substrate having a well region, a structure configured to have a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked along each of the plurality of channel layers, a plurality of memory layers interposed respectively between each of the plurality of channel layers and each of the plurality of gate electrodes, a source line formed in the substrate between a plurality of the structures, a plurality of source contact plugs placed between the plurality of structures and connected with the source line, and a well pickup contact plug placed between the plurality of structures and connected with the well region.Type: GrantFiled: August 15, 2014Date of Patent: May 5, 2015Assignee: SK Hynix Inc.Inventor: In-Hey Lee
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Publication number: 20140357031Abstract: A nonvolatile memory device may include a plurality of channel layers protruded substantially perpendicularly over a substrate having a well region, a structure configured to have a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked along each of the plurality of channel layers, a plurality of memory layers interposed respectively between each of the plurality of channel layers and each of the plurality of gate electrodes, a source line formed in the substrate between a plurality of the structures, a plurality of source contact plugs placed between the plurality of structures and connected with the source line, and a well pickup contact plug placed between the plurality of structures and connected with the well region.Type: ApplicationFiled: August 15, 2014Publication date: December 4, 2014Inventor: In-Hey LEE
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Publication number: 20140299931Abstract: A nonvolatile memory device includes a substrate comprising a first word line formation area, a second word line formation area, and a support area interposed between the first and second word line formation areas; a first stacked structure disposed over the substrate of each of the first and second word line formation areas and having a plurality of interlayer dielectric layers and a plurality of conductive layers that are alternately stacked therein; a second stacked structure disposed over the substrate of the support area and having the plurality of interlayer dielectric layers and a plurality of spaces that are alternately stacked therein; a channel layer disposed in the first stacked structure; and a memory layer interposed between the channel layer and each of the plurality of conductive layers.Type: ApplicationFiled: July 17, 2013Publication date: October 9, 2014Inventors: Eun-Seok CHOI, Sa-Yong SHIM, In-Hey LEE, Sung-Wook JUNG, Jung-Seok OH
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Patent number: 8836013Abstract: A nonvolatile memory device may include a plurality of channel layers protruded substantially perpendicularly over a substrate having a well region, a structure configured to have a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked along each of the plurality of channel layers, a plurality of memory layers interposed respectively between each of the plurality of channel layers and each of the plurality of gate electrodes, a source line formed in the substrate between a plurality of the structures, a plurality of source contact plugs placed between the plurality of structures and connected with the source line, and a well pickup contact plug placed between the plurality of structures and connected with the well region.Type: GrantFiled: December 17, 2012Date of Patent: September 16, 2014Assignee: SK Hynix Inc.Inventor: In-Hey Lee
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Patent number: 8717814Abstract: A three-dimensional (3-D) nonvolatile memory device includes vertical channel layers protruded from a substrate, interlayer insulating layers and memory cells, which are alternately stacked along the vertical channel layers, and select transistors including planar channel layers, each contacted with at least one of the vertical channel layers and being parallel to the substrate, and gate insulating layers formed over the planar channel layers.Type: GrantFiled: August 30, 2012Date of Patent: May 6, 2014Assignee: SK Hynix Inc.Inventors: Sang Moo Choi, In Hey Lee
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Publication number: 20140042519Abstract: A nonvolatile memory device may include a plurality of channel layers protruded substantially perpendicularly over a substrate having a well region, a structure configured to have a plurality of interlayer insulating layers and a plurality of gate electrodes alternately stacked along each of the plurality of channel layers, a plurality of memory layers interposed respectively between each of the plurality of channel layers and each of the plurality of gate electrodes, a source line formed in the substrate between a plurality of the structures, a plurality of source contact plugs placed between the plurality of structures and connected with the source line, and a well pickup contact plug placed between the plurality of structures and connected with the well region.Type: ApplicationFiled: December 17, 2012Publication date: February 13, 2014Applicant: SK hynix Inc.Inventor: In-Hey LEE
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Publication number: 20130100741Abstract: A three-dimensional (3-D) nonvolatile memory device includes vertical channel layers protruded from a substrate, interlayer insulating layers and memory cells, which are alternately stacked along the vertical channel layers, and select transistors including planar channel layers, each contacted with at least one of the vertical channel layers and being parallel to the substrate, and gate insulating layers formed over the planar channel layers.Type: ApplicationFiled: August 30, 2012Publication date: April 25, 2013Inventors: Sang Moo CHOI, In Hey LEE
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Publication number: 20120273865Abstract: A three dimensional (3-D) non-volatile memory device includes a pipe gate including a first pipe gate, a second pipe gate formed on the first pipe gate, and a first interlayer insulating layer interposed between the first pipe gate and the second pipe gate, word lines alternately stacked with second interlayer insulating layers on the pipe gate, a pipe channel buried within the pipe gate, and memory cell channels coupled to the pipe channel and arranged to pass through the word lines and the second interlayer insulating layers.Type: ApplicationFiled: April 25, 2012Publication date: November 1, 2012Inventors: In Hey LEE, Byung Soo PARK, Sang Hyun OH, Sun Mi PARK
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Patent number: 5454788Abstract: A balloon catheter includes a flexible small-diameter guide wire provided with an enlarged-diameter distal end portion, and a flexible elongated tubular shaft with at least one dual-function fluid-conducting lumen adapted to both receive the guide wire extending therethrough, and to communicate pressurized inflation fluid to a distal balloon of the catheter. A distal orifice of the catheter communicates with the balloon and is provided with selective valving means for releasably engaging sealingly with the enlarged distal end portion of the guide wire. Apparatus is disclosed for axially moving the guide wire to effect engagement and disengagement of the enlarged distal end portion with the selective valving means of the catheter shaft. A torquer device is also provided by means of which the guide wire may be rotated relative to the catheter shaft for steering of the guide wire along a vascular pathway.Type: GrantFiled: April 15, 1994Date of Patent: October 3, 1995Assignee: Baxter International Inc.Inventors: Blair Walker, Manouchehr Miraki, William Rice, Kambiz Ghaerzadeh, Brett Trauthen, Hey Lee, Greg Welsh, Henry Nita, Shawn O'Leary, Mark Dehdashtian, Sheryl W. Higgins, Nora Pham