Patents by Inventor Hian-Hang Mah

Hian-Hang Mah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8546942
    Abstract: Disclosed is a flip-chip semiconductor device having isotropic electrical interconnection, primarily comprising a chip and a substrate. The chip has at least a first bump and a plurality of second bumps. The substrate has a plurality of bump pads disposed on the top surface and an isotropic connecting mechanism disposed inside the substrate consisting of a plurality of terminals electrically isolated from each other and a flexible vertical pad protruded from the top surface, wherein the disposition locations of the terminals circle around the flexible vertical pad as a disposition center. When the second bumps of the chip are bonded onto the corresponding bump pads, the first bump presses and bends the flexible vertical pad in a specific horizontal direction so that the flexible vertical pad selectively and electrically connect to a selected one of the terminals.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: October 1, 2013
    Assignee: Powertech Technology Inc.
    Inventor: Hian-Hang Mah
  • Patent number: 8378483
    Abstract: Disclosed are a fabrication process and a device of a multi-chip package having spliced substrates, characterized in utilizing an incomplete substrate and a substrate block with different dimensions to combine as a spliced complete substrate during the fabrication process. Two kinds of chips with different functions, including memory and controller, are disposed on the incomplete substrate and the substrate block, respectively. Then, the incomplete substrate and the substrate block are then spliced together by joining their spliced portions formed on their substrate sidewalls. Finally, an encapsulant is formed on the incomplete substrate and further formed on the substrate block. Accordingly, it is possible to integrate different functional chips into a single multi-chip package by optimizing packaging processing parameters with optimized materials.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: February 19, 2013
    Assignee: Powertech Technology Inc.
    Inventor: Hian-Hang Mah
  • Publication number: 20130026625
    Abstract: Disclosed is a flip-chip semiconductor device having isotropic electrical interconnection, primarily comprising a chip and a substrate. The chip has at least a first bump and a plurality of second bumps. The substrate has a plurality of bump pads disposed on the top surface and an isotropic connecting mechanism disposed inside the substrate consisting of a plurality of terminals electrically isolated from each other and a flexible vertical pad protruded from the top surface, wherein the disposition locations of the terminals circle around the flexible vertical pad as a disposition center. When the second bumps of the chip are bonded onto the corresponding bump pads, the first bump presses and bends the flexible vertical pad in a specific horizontal direction so that the flexible vertical pad selectively and electrically connect to a selected one of the terminals.
    Type: Application
    Filed: April 18, 2012
    Publication date: January 31, 2013
    Inventor: Hian-Hang MAH
  • Publication number: 20130001806
    Abstract: Disclosed are a fabrication process and a device of a multi-chip package having spliced substrates, characterized in utilizing an incomplete substrate and a substrate block with different dimensions to combine as a spliced complete substrate during the fabrication process. Two kinds of chips with different functions, including memory and controller, are disposed on the incomplete substrate and the substrate block, respectively. Then, the incomplete substrate and the substrate block are then spliced together by joining their spliced portions formed on their substrate sidewalls. Finally, an encapsulant is formed on the incomplete substrate and further formed on the substrate block. Accordingly, it is possible to integrate different functional chips into a single multi-chip package by optimizing packaging processing parameters with optimized materials.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 3, 2013
    Inventor: Hian-Hang MAH