Abstract: The present invention provides a method for forming a memory cell. The method comprises providing a substrate and then forming a dielectric layer on the substrate. Following, a conductive layer and a stop layer are sequentially formed on the dielectric layer. Then, a bit line pattern is defined on the substrate to form bit lines. Next, spacers are formed on the sidewalls of the conductive layer and the polishing layer and then a self-aligned silicide process is proceeded. Following, an oxide layer is filled into the bit lines and the oxide layer is etched or polished to stop on the stop layer by etch back or chemical mechanism polishing method. Last, the stop layer is removed and a polysilicon layer is deposited to form word lines.

Abstract: The present invention provides a method for forming a memory cell. The method comprises providing a substrate and then forming a dielectric layer on the substrate. Following, a conductive layer and a stop layer are sequentially formed on the dielectric layer. Then, a bit line pattern is defined on the substrate to form bit lines. Next, spacers are formed on the sidewalls of the conductive layer and the polishing layer and then a self-aligned silicide process is proceeded. Following, an oxide layer is filled into the bit lines and the oxide layer is etched or polished to stop on the stop layer by etch back or chemical mechanism polishing method. Last, the stop layer is removed and a polysilicon layer is deposited to form word lines.