Patents by Inventor Hibiki Takano

Hibiki Takano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7154786
    Abstract: A nonvolatile memory working on a different operating voltage from a logical functional unit is to be operated at high speed with a single line voltage supplied from outside. A nonvolatile memory is disposed in a semiconductor integrated circuit device. This semiconductor integrated circuit device is provided with core regulators for generating from an externally supplied line voltage, different operating line voltages, a PLL regulator, a regulator for power supply circuit and a regulator for decoder. The regulator for power supply circuit and the regulator for decoder respectively generate, from the externally supplied line voltage, a first line voltage and a second line voltage to be supplied to the nonvolatile memory. The core regulators generate line voltages to be supplied to internal modules of the semiconductor integrated circuit device, and the PLL regulator generates a line voltage for the PLL.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: December 26, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Toshiharu Ikai, Takenori Ito, Hibiki Takano
  • Publication number: 20050083762
    Abstract: A nonvolatile memory working on a different operating voltage from a logical functional unit is to be operated at high speed with a single line voltage supplied from outside. A nonvolatile memory is disposed in a semiconductor integrated circuit device. This semiconductor integrated circuit device is provided with core regulators for generating from an externally supplied line voltage, different operating line voltages, a PLL regulator, a regulator for power supply circuit and a regulator for decoder. The regulator for power supply circuit and the regulator for decoder respectively generate, from the externally supplied line voltage, a first line voltage and a second line voltage to be supplied to the nonvolatile memory. The core regulators generate line voltages to be supplied to internal modules of the semiconductor integrated circuit device, and the PLL regulator generates a line voltage for the PLL.
    Type: Application
    Filed: October 12, 2004
    Publication date: April 21, 2005
    Inventors: Toshiharu Ikai, Takenori Ito, Hibiki Takano