Patents by Inventor Hideaki Hasegawa

Hideaki Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120001952
    Abstract: A driving circuit includes a pair of operational amplifiers, one producing an analog voltage output of positive polarity, the other producing an analog voltage output of negative polarity. An output switching circuit interchanges these outputs between a pair of data lines. One or both of the operational amplifiers includes a parasitic diode having one terminal connected to the output terminal of the operational amplifier and another terminal normally connected to a power supply voltage of the operational amplifier. When the output of the operational amplifier is switched, a protective switching circuit temporarily disconnects the parasitic diode from the power supply of the operational amplifier and instead connects it to a power supply line carrying a voltage high enough, or low enough, to ensure that the parasitic diode is not forward biased by the existing voltage on the data line to which the output is switched.
    Type: Application
    Filed: June 21, 2011
    Publication date: January 5, 2012
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Hideaki Hasegawa, Atsushi Hirama, Koji Higuchi
  • Patent number: 8040928
    Abstract: A semiconductor laser is provided capable of generating very narrow laser beams and having stable characteristics, a method for generating the laser beams and a method for reducing a spectral line-width of the laser beams. The semiconductor laser includes a semiconductor active layer, a photonic crystal optical waveguide forming a periodic structure of two-dimensional refractive index within a plane perpendicular to a semiconductor laminate direction directly or indirectly connected to the semiconductor active layer; and an optical cavity that contains the semiconductor active layer and the photonic crystal optical waveguide and oscillates light that is generated from the semiconductor active layer and is guided through the photonic crystal optical waveguide as laser.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: October 18, 2011
    Assignee: Furukawa Electric Co., Ltd.
    Inventor: Hideaki Hasegawa
  • Patent number: 8036544
    Abstract: An image forming apparatus has a developer container containing a developer and a developer carrying member for carrying the developer and adapted to switch an AC voltage to be applied to the developer carrying member. The apparatus includes a detecting member for detecting the amount of developer in the developer container and a processing portion for determining the amount of developer in the developer container according to the value output by the detecting member when the AC voltage is applied to the developer carrying member. The processing portion is adapted to determine the amount of developer by executing a process that corresponds to the operation of switching the AC voltage.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: October 11, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsushi Toda, Takeo Shoji, Satoshi Sunahara, Hideaki Hasegawa
  • Publication number: 20110243494
    Abstract: Included are a semiconductor device unit in which a semiconductor optical amplifier and a first semiconductor photo detector being configured to monitor a part of an input light input to the semiconductor optical amplifier or a part of an output light output from the semiconductor optical amplifier are integrated on a mutually same substrate, and a passive waveguide unit connected to the semiconductor device unit and in which a first passive waveguide being configured to cause the input light to be input to the semiconductor optical amplifier or to cause the output light to be output from the semiconductor optical amplifier and a second passive waveguide branching from the first passive waveguide and being configured to cause a part of the input light or a part of the output light to be input to the first semiconductor photo detector are provided on a mutually same substrate.
    Type: Application
    Filed: February 2, 2011
    Publication date: October 6, 2011
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Hideaki HASEGAWA, Masaki Funabashi
  • Patent number: 8031012
    Abstract: The objects of the present invention are to shorten a cavity length of an optoelectronic oscillator and to integrate on a semiconductor or SiO2-substrate. An optoelectronic oscillator 10 have an optoelectronic loop comprising a semiconductor laser 11, an optical waveguide 12 guiding laser light emitted from the semiconductor laser, a photodetector 13 detecting laser light guided by the optical waveguide and outputting an electrical signal, an amplifier 14 amplifying the electrical signal outputted from the photodetector, generating an amplified signal and formed on a semiconductor substrate 15. Laser light emitted from the semiconductor laser 11 is controlled by generated amplified signal and it oscillates with a fundamental oscillation frequency determined by a delay time of carrier in the optoelectronic loop circuit or one of the high harmonic components of integral multiples of a fundamental oscillation frequency.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: October 4, 2011
    Assignee: Furukawa Electric Co., Ltd.
    Inventor: Hideaki Hasegawa
  • Publication number: 20110157120
    Abstract: A drive circuit for driving a display panel includes a first operation amplifier for operating using a first power source voltage and a second power source voltage; a second operation amplifier for operating using a third power source voltage and a fourth power source voltage; a control unit for supplying a first control voltage and a second control voltage; and a switch circuit for switching the first operation amplifier and the second operation amplifier. The switch circuit includes an n-channel type field effect transistor. The control unit applies the first control voltage to the n-channel type field effect transistor, so that the n-channel type field effect transistor transits from a non-conductive state to a conductive state.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 30, 2011
    Inventors: Hideaki HASEGAWA, Kunihiro Harayama, Koji Higuchi, Atsushi Hirama
  • Patent number: 7948278
    Abstract: The present invention provides a load capacity driving circuit that is inexpensive and has a high driving capability. When an input signal changes to low potential, gate voltage of an output stage of an amplifying circuit increases, an NMOS transistor MNO turns on, and an NMOS transistor MN8 increases potential of a node NGAT. Due thereto, an NMOS transistor MNO2 also turns on, and a load capacity is discharged via the NMOS transistor MNO and the NMOS transistor MNO2. Further, when the input signal changes to high potential, gate voltage of the output stage of the amplifying circuit decreases, a PMOS transistor MPO turns on, and a PMOS transistor MP8 decreases potential of a node PGAT. Due thereto, a PMOS transistor MPO2 also turns on, and the load capacity is charged from a constant voltage source via the PMOS transistor MPO and the PMOS transistor MPO2.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: May 24, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Hideaki Hasegawa, Koji Higuchi, Atsushi Hirama, Koji Yamazaki
  • Publication number: 20100254085
    Abstract: Provided is an electronic apparatus capable of preventing an unnecessary space from being made inside the housing, and of improving ventilation efficiency of the air flowing along the power circuit. An electronic apparatus includes: a power circuit; a power circuit case (4) housing the power circuit; and a housing (2) for housing the electronic apparatus and the power circuit case (4). The power circuit case (4) includes a rear wall portion (43) having an air outlet (43a) formed therein, and the housing (2) having an opening (2a) formed therein, a shape of the opening corresponding to the rear wall portion (43) of the power circuit case (4). The power circuit case (4) is arranged such that the rear wall portion (43) is exposed through the opening (2a).
    Type: Application
    Filed: March 31, 2010
    Publication date: October 7, 2010
    Applicant: SONY COMPUTER ENTERTAINMENT INC.
    Inventors: Hideaki HASEGAWA, Keiichi Aoki
  • Publication number: 20100250873
    Abstract: A management includes an acquiring unit for acquiring information of specifying a target virtual storage in a target storage pool and an expansion storage capacity to be acquired from another storage pool other than the target storage pool, and a determining unit for determining the real storage to be used for the expansion storage capacity of the target virtual storage from candidate one of the real storages in the another storage pool, which are under the control of the controller in charge of the real storage that the target virtual storage is defined, on the basis of an occupied storage capacity defined as the virtual storage on the real storage in the another storage pool and a free storage capacity of the real storage in the another storage pool.
    Type: Application
    Filed: February 5, 2010
    Publication date: September 30, 2010
    Applicant: Fujitsu Limited
    Inventors: Keiko Fujii, Noriaki Matsuzaki, Akinori Tanizawa, Hideaki Hasegawa
  • Publication number: 20100246613
    Abstract: A semiconductor laser is provided capable of generating very narrow laser beams and having stable characteristics, a method for generating the laser beams and a method for reducing a spectral line-width of the laser beams. The semiconductor laser includes a semiconductor active layer, a photonic crystal optical waveguide forming a periodic structure of two-dimensional refractive index within a plane perpendicular to a semiconductor laminate direction directly or indirectly connected to the semiconductor active layer; and an optical cavity that contains the semiconductor active layer and the photonic crystal optical waveguide and oscillates light that is generated from the semiconductor active layer and is guided through the photonic crystal optical waveguide as laser.
    Type: Application
    Filed: January 19, 2010
    Publication date: September 30, 2010
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventor: Hideaki Hasegawa
  • Publication number: 20100245987
    Abstract: It is desirable to provide a semiconductor optical amplifier from which it becomes able to obtain a higher output power. A semiconductor optical amplifier in comprises an active wave guiding layer which comprises a passive core region that is formed of a semiconductor, and active cladding regions that are located at both sides of the passive core region and each of that is comprised of an active layer which is formed of a semiconductor and which has an index of refraction to be lower than that of the passive core region, wherein a light is wave guided with being amplified in the active wave guiding layer. Moreover, it is desirable for the active wave guiding layer to be formed of a compound semiconductor, and to be formed by integrating the passive core region and the active cladding regions to be monolithic on to a substrate that is formed of a compound semiconductor by making use of a process of a butt joint growth.
    Type: Application
    Filed: February 18, 2010
    Publication date: September 30, 2010
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Hideaki Hasegawa, Masaki Funabashi, Noriyuki Yokouchi, Junji Yoshida
  • Patent number: 7752295
    Abstract: When information on a device such as a server, storage, and an FC switch constituting a SNA system is input, these devices are displayed and arranged properly on a screen (S1, S2). When information on a physical path is input by a designer by using this display screen, a virtual SAN system in which the devices are connected by a fiber channel is displayed on the screen (S3). Furthermore, when information on an access path is input by the designer by using the construction image, the access path is additionally displayed on the construction image of the virtual SAN system (S5). Since the construction image of the virtual SAN system is displayed on the screen, the designer can easily create a design drawing while visually checking the SAN system. This can reduce the work load and time required for construction of the SAN system.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: July 6, 2010
    Assignee: Fujitsu Limited
    Inventors: Sachiko Terai, Sawao Iwatani, Hideyuki Tanaka, Shigeru Honmura, Noriaki Matsuzaki, Yasushi Kisimoto, Fumikazu Fujimoto, Kenichi Matsumoto, Hiroki Ohashi, Hideaki Hasegawa, Keiko Usunaga, Soichi Takeuchi
  • Publication number: 20100123704
    Abstract: The present disclosure provides a display panel driving apparatus that can make the circuit layout surface area smaller, and prevent circuit damage. The display panel driving apparatus includes a source amplifier, a sink amplifier, a switch and the like. The source amplifier includes a first output circuit, a second output circuit and the like, and a guard transistor is provided between the first output circuit and the second output circuit to prevent an output signal voltage of the first output circuit from becoming less than an intermediate voltage. The sink amplifier includes a first output circuit and a second output circuit, and a guard transistor is provided between the first output circuit and the second output circuit to prevent an output signal voltage of the first output circuit from exceeding an intermediate voltage.
    Type: Application
    Filed: November 17, 2009
    Publication date: May 20, 2010
    Inventors: Manabu Nishimizu, Yuushi Shutou, Hideaki Hasegawa, Koji Higuchi
  • Patent number: 7692804
    Abstract: An image forming apparatus operates in a first image formation mode for forming an image on an image bearing member by using developer under a first predetermined image forming condition and a second image formation mode for forming an image on an image bearing member by using developer under a second image forming condition which is different from the first predetermined image forming condition. The apparatus is set so that the amount of consumption of developer for forming an image in the second image formation mode is smaller than the amount of consumption used for forming an identical image in the first image formation mode.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: April 6, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Norihito Naito, Yasunao Otomo, Hideaki Hasegawa, Nobuo Oshima
  • Publication number: 20100054780
    Abstract: An image forming apparatus includes an image bearing member for bearing an electrostatic latent image; a developing device including a developer carrying member for carrying a developer and developing an electrostatic latent image formed on the image bearing member, and a supplying member for contacting to the developer carrying member to supply the developer to the developer carrying member; and a control device for controlling Vdr and Vrs such that Vrs relative to Vdr increases in a direction of a polarity which is the same as a polarity of the developer with the decrease of an absolute value S, where S is a difference between a peripheral speed Sopc of a surface of the image bearing member and a peripheral speed Sdr of the surface of the developer carrying member, Vrs is a voltage applied to the supplying member, and Vdr is a voltage applied to the developer carrying member.
    Type: Application
    Filed: August 27, 2009
    Publication date: March 4, 2010
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takuya Kitamura, Kohei Matsuda, Hideaki Hasegawa
  • Patent number: 7639956
    Abstract: An image forming apparatus has a first image formation mode for forming an image on an image bearing member by using developer under a first predetermined image forming condition and a second image formation mode for forming an image on an image bearing member by using developer under a second image forming condition which is different from the first predetermined image forming condition and is set so that an amount of consumption of developer with respect to an identical image in the second image formation mode is smaller than that in the first image formation mode, the apparatus includes storing means for storing information on an amount of usage of the image bearing member, and control means for changing the second image forming condition in the second image formation mode depending on the information stored in the storing means.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: December 29, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Norihito Naito, Kazumi Yamauchi, Yasunao Otomo, Hideaki Hasegawa, Nobuo Oshima
  • Publication number: 20090225799
    Abstract: The objects of the present invention are to shorten a cavity length of an optoelectronic oscillator and to integrate on a semiconductor or SiO2-substrate. An optoelectronic oscillator 10 have an optoelectronic loop comprising a semiconductor laser 11, an optical waveguide 12 guiding laser light emitted from the semiconductor laser, a photodetector 13 detecting laser light guided by the optical waveguide and outputting an electrical signal, an amplifier 14 amplifying the electrical signal outputted from the photodetector, generating an amplified signal and formed on a semiconductor substrate 15. Laser light emitted from the semiconductor laser 11 is controlled by generated amplified signal and it oscillates with a fundamental oscillation frequency determined by a delay time of carrier in the optoelectronic loop circuit or one of the high harmonic components of integral multiples of a fundamental oscillation frequency.
    Type: Application
    Filed: February 6, 2009
    Publication date: September 10, 2009
    Applicant: THE FURUKAWA ELECTRIC CO., LTD
    Inventor: Hideaki Hasegawa
  • Publication number: 20090212832
    Abstract: The present invention provides a load capacity driving circuit that is inexpensive and has a high driving capability. When an input signal changes to low potential, gate voltage of an output stage of an amplifying circuit increases, an NMOS transistor MNO turns on, and an NMOS transistor MN8 increases potential of a node NGAT. Due thereto, an NMOS transistor MNO2 also turns on, and a load capacity is discharged via the NMOS transistor MNO and the NMOS transistor MNO2. Further, when the input signal changes to high potential, gate voltage of the output stage of the amplifying circuit decreases, a PMOS transistor MPO turns on, and a PMOS transistor MP8 decreases potential of a node PGAT. Due thereto, a PMOS transistor MPO2 also turns on, and the load capacity is charged from a constant voltage source via the PMOS transistor MPO and the PMOS transistor MPO2.
    Type: Application
    Filed: January 22, 2009
    Publication date: August 27, 2009
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Hideaki Hasegawa, Koji Higuchi, Atsushi Hirama, Koji Yamazaki
  • Patent number: 7518412
    Abstract: A current mirror circuit includes p-type MOS (PMOS) transistors, whereby the current flowing when the input voltage is “H” is interrupted when an output node of the current mirror circuit goes from “L” to “H,” so that a cascode-connected PMOS transistor within the current mirror circuit is automatically turned OFF. The gates of PMOS transistors within the current mirror circuit are connected by a signal line directly to the output node. The rise time of the output voltage of the current mirror circuit and the consumption current can thus be reduced.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: April 14, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Hideaki Hasegawa, Takashi Honda
  • Publication number: 20090052918
    Abstract: An image forming apparatus having a developer container containing a developer and a developer carrying member for carrying the developer and adapted to switch an AC voltage to be applied to the developer carrying member, the apparatus comprising a detecting member for detecting the amount of developer in the developer container and a processing portion for determining the amount of developer in the developer container according to the value output by the detecting member when the AC voltage is applied to the developer carrying member, the processing portion being adapted to determine the amount of developer by executing a process that corresponds to the operation of switching the AC voltage.
    Type: Application
    Filed: October 20, 2008
    Publication date: February 26, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Atsushi Toda, Takeo Shoji, Satoshi Sunahara, Hideaki Hasegawa