Patents by Inventor Hideaki Horii

Hideaki Horii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and display device having alignment mark
    Patent number: 7825529
    Abstract: A semiconductor device includes a semiconductor substrate and an alignment mark. The alignment mark is provided on the semiconductor substrate and optically detectable. The alignment mark includes a bright area and a dark area. The bright area outputs light reflected from a surface of the semiconductor substrate. The dark area includes metal wirings, outputs light reflected from surfaces of the metal wirings, and has brightness lower than that of the bright area.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: November 2, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Hideaki Horii
  • Semiconductor device and manufacturing process therefor
    Patent number: 7400008
    Abstract: An objective of this invention is to provide a semiconductor device comprising a less bias-dependent capacitative element with a large capacity per a unit area, having a configuration which can be manufactured using an existing structure in a semiconductor device. There is provided a semiconductor device 100, comprising a semiconductor substrate; a lower interconnection 101 on the semiconductor substrate, in whose upper surface a concave is formed; dielectrics 102a, 102b, 102c, 102d covering the inner surface of the concave; and a upper interconnection 104 on the dielectrics 102a, 102b, 102c, 102d.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: July 15, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Hideaki Horii
  • Semiconductor device and display device having alignment mark
    Publication number: 20080121915
    Abstract: A semiconductor device includes a semiconductor substrate and an alignment mark. The alignment mark is provided on the semiconductor substrate and optically detectable. The alignment mark includes a bright area and a dark area. The bright area outputs light reflected from a surface of the semiconductor substrate. The dark area includes metal wirings, outputs light reflected from surfaces of the metal wirings, and has brightness lower than that of the bright area.
    Type: Application
    Filed: October 5, 2007
    Publication date: May 29, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hideaki Horii
  • Semiconductor device and manufacturing process therefor
    Publication number: 20050196916
    Abstract: An objective of this invention is to provide a semiconductor device comprising a less bias-dependent capacitative element with a large capacity per a unit area, having a configuration which can be manufactured using an existing structure in a semiconductor device. There is provided a semiconductor device 100, comprising a semiconductor substrate; a lower interconnection 101 on the semiconductor substrate, in whose upper surface a concave is formed; dielectrics 102a, 102b, 102c, 102d covering the inner surface of the concave; and a upper interconnection 104 on the dielectrics 102a, 102b, 102c, 102d.
    Type: Application
    Filed: March 2, 2005
    Publication date: September 8, 2005
    Inventor: Hideaki Horii