Patents by Inventor Hideaki Matsuhashi
Hideaki Matsuhashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7540726Abstract: By cutting-machining a side face of a scroll wrap with a non-rotational tool, swells in the perimeter direction have a smaller size. Thus, compressed gas is prevented from leaking between relatively slidable side faces of the respective wraps of the stationary scroll and the slewing scroll. This configuration provides a scroll compressor that has a higher accuracy and thus high compression efficiency and low noise are realized.Type: GrantFiled: October 24, 2003Date of Patent: June 2, 2009Assignee: Panasonic CorporationInventor: Hideaki Matsuhashi
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Patent number: 7293945Abstract: A non-rotary cutting tool which is to be moved relative to a workpiece in a predetermined direction for cutting the workpiece, with its rake face being held substantially perpendicular to the predetermined direction. The cutting tool includes (a) a generally cylindrical shank portion, and (b) a generally semi-cylindrical body portion which has an outer circumferential surface constituted by the rake face and a semi-cylindrical surface. The semi-cylindrical body portion has a cutting edge which is defined by an edge of the rake face and which is covered with a diamond coating. Also disclosed is a process of machining a scroll member of a scroll compressor by using this non-rotary cutting tool.Type: GrantFiled: December 15, 2005Date of Patent: November 13, 2007Assignees: Matsushita Electric Industrial Co., Ltd, OSG CorporationInventors: Hideaki Matsuhashi, Tamotsu Nagai
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Patent number: 7237992Abstract: A process of machining a scroll member of a scroll compressor by using a non-rotary cutting tool. The non-rotary cutting tool is moved relative to a workpiece in a predetermined direction for cutting the workpiece, with its rake face being held substantially perpendicular to the predetermined direction. The cutting tool includes (a) a generally cylindrical shank portion, and (b) a generally semi-cylindrical body portion which has an outer circumferential surface constituted by the rake face and a semi-cylindrical surface. The semi-cylindrical body portion has a cutting edge which is defined by an edge of the rake face and which is covered with a diamond coating. The rake face has a planar surface and a constant width throughout the cutting edge.Type: GrantFiled: April 4, 2005Date of Patent: July 3, 2007Assignees: Matsushita Electric Industrial Co., Ltd., OSG CorporationInventors: Hideaki Matsuhashi, Tamotsu Nagai
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Publication number: 20070018277Abstract: Channel forming sections that are respectively p types and have hexahedral structures are provided in a silicon epitaxial layer of an SOS substrate. Gate oxide films and a gate electrode are provided at both side surfaces of the channel forming sections. Thus, channels can be formed along both side surfaces of the channel forming sections. In the SOS substrate, compressive stress lying in the direction parallel to the surface of the silicon epitaxial layer is produced in the silicon epitaxial layer upon its manufacture. Therefore, when the channels are formed along the upper surfaces of the channel forming sections, the mobility of electrons is reduced. On the other hand, since tensile stress occurs in the direction normal to the surface of the silicon epitaxial layer, the mobility of electrons can be made high by forming channels along the side surfaces of the channel forming sections, so that the mobility of electrons can be set high and an on-current can be increased.Type: ApplicationFiled: June 26, 2006Publication date: January 25, 2007Applicant: Oki Electric Industry Co., Ltd.Inventor: Hideaki Matsuhashi
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Publication number: 20060159580Abstract: By cutting-machining a side face of a scroll wrap with a non-rotational tool, swells in the perimeter direction have a smaller size. Thus, the leakage of compressed gas is prevented from being caused between side faces sliding to each other of the respective wraps of the stationary scroll and the slewing scroll. This configuration provides a scroll compressor that has a higher accuracy by which a high compression efficiency and low noise are realized.Type: ApplicationFiled: October 24, 2003Publication date: July 20, 2006Inventor: Hideaki Matsuhashi
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Publication number: 20060133904Abstract: A non-rotary cutting tool which is to be moved relative to a workpiece in a predetermined direction for cutting the workpiece, with its rake face being held substantially perpendicular to the predetermined direction. The cutting tool includes (a) a generally cylindrical shank portion, and (b) a generally semi-cylindrical body portion which has an outer circumferential surface constituted by the rake face and a semi-cylindrical surface. The semi-cylindrical body portion has a cutting edge which is defined by an edge of the rake face and which is covered with a diamond coating. Also disclosed is a process of machining a scroll member of a scroll compressor by using this non-rotary cutting tool.Type: ApplicationFiled: December 15, 2005Publication date: June 22, 2006Inventors: Hideaki Matsuhashi, Tamotsu Nagai
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Publication number: 20050166739Abstract: A process of machining a scroll member of a scroll compressor by using a non-rotary cutting tool. The non-rotary cutting tool is to be moved relative to a workpiece in a predetermined direction for cutting the workpiece, with its rake face being held substantially perpendicular to the predetermined direction. The cutting tool includes (a) a generally cylindrical shank portion, and (b) a generally semi-cylindrical body portion which has an outer circumferential surface constituted by the rake face and a semi-cylindrical surface. The semi-cylindrical body portion has a cutting edge which is defined by an edge of the rake face and which is covered with a diamond coating.Type: ApplicationFiled: April 4, 2005Publication date: August 4, 2005Inventors: Hideaki Matsuhashi, Tamotsu Nagai
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Patent number: 6921689Abstract: A method of manufacturing a capacitor having a couple of electrodes with a dielectric placed therebetween. At least one of the electrodes is made of copper, and barriers for preventing the diffusion of copper into the dielectric are provided between the dielectric and the copper electrode, respectively.Type: GrantFiled: April 13, 2004Date of Patent: July 26, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Hideaki Matsuhashi
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Patent number: 6856501Abstract: A capacitor has a couple of electrodes with a dielectric placed therebetween. At least one of the electrodes is made of copper, and barriers for preventing the diffusion of copper into the dielectric are provided between the dielectric and the copper electrode, respectively.Type: GrantFiled: April 13, 2004Date of Patent: February 15, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Hideaki Matsuhashi
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Patent number: 6833589Abstract: A field oxide film for element isolation is formed on an SOI substrate having a silicon layer formed on an insulating layer, an active nitride film is wet-etched to reduce its film thickness to a value small enough to allow the edge of the silicon layer to become exposed and ions of a channel stopping impurity are implanted only into the edge of the silicon layer through self-alignment either vertically or at an angle by using the active nitride film as a mask. Through this manufacturing method, a field effect transistor which achieves a small gate length, is free from the adverse effect of a parasitic transistor and thus does not readily manifest a hump, and allows a reduction in the distance between an nMOS and a pMOS provided next to each other is realized.Type: GrantFiled: February 15, 2002Date of Patent: December 21, 2004Assignee: Oki Electric Industry Co., Ltd.Inventors: Hideaki Matsuhashi, Yoko Kajita, Yoshihiro Koga, Toshiyuki Nakamura, Jun Kanamori
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Publication number: 20040221696Abstract: A non-rotary cutting tool which is to be moved relative to a workpiece in a predetermined direction for cutting the workpiece, with its rake face being held substantially perpendicular to the predetermined direction. The cutting tool includes (a) a generally cylindrical shank portion, and (b) a generally semi-cylindrical body portion which has an outer circumferential surface constituted by the rake face and a semi-cylindrical surface. The semi-cylindrical body portion has a cutting edge which is defined by an edge of the rake face and which is covered with a diamond coating. Also disclosed is a process of machining a scroll member of a scroll compressor by using this non-rotary cutting tool.Type: ApplicationFiled: February 4, 2004Publication date: November 11, 2004Inventors: Hideaki Matsuhashi, Tamotsu Nagai
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Patent number: 6809380Abstract: A lower buried oxide film, a stress-relief film, an upper buried oxide film, and an SOI film are formed over a semiconductor substrate in this order. The thermal expansion coefficient of the stress-relief film is greater than the thermal expansion coefficient of the upper buried oxide film. The stress-relief film desirably has a thermal expansion coefficient equal to or greater than the thermal expansion coefficient of the SOI film. For example, it is formed of a silicon film, or of a composite film laminating a silicon film, a germanium film disposed thereon, and a silicon film disposed thereon. Accordingly, a semiconductor device having an SOI MOSFET is to be provided, which has excellent characteristics such as low parasitic capacitance and a small S value and is hardly affected by the stress generated by the difference between thermal expansion coefficients of the buried oxide film and the SOI film.Type: GrantFiled: June 23, 2003Date of Patent: October 26, 2004Assignee: Oki Electric Industry Co., Ltd.Inventor: Hideaki Matsuhashi
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Publication number: 20040190220Abstract: A capacitor has a couple of electrodes with a dielectric placed therebetween. At least one of the electrodes is made of copper, and barriers for preventing the diffusion of copper into the dielectric are provided between the dielectric and the copper electrode, respectively.Type: ApplicationFiled: April 13, 2004Publication date: September 30, 2004Inventor: Hideaki Matsuhashi
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Publication number: 20040188748Abstract: A method of manufacturing a capacitor having a couple of electrodes with a dielectric placed therebetween. At least one of the electrodes is made of copper, and barriers for preventing the diffusion of copper into the dielectric are provided between the dielectric and the copper electrode respectively.Type: ApplicationFiled: April 13, 2004Publication date: September 30, 2004Inventor: Hideaki Matsuhashi
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Patent number: 6759703Abstract: A capacitor has a coupled of electrodes with a dielectric placed therebetween. At least one of the electrodes is made of copper, and barriers for preventing the diffusion of copper into the dielectric are provided between the dielectric and the copper electrodes, respectively.Type: GrantFiled: October 11, 2000Date of Patent: July 6, 2004Assignee: Oki Electric Industry Co., Ltd.Inventor: Hideaki Matsuhashi
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Patent number: 6727147Abstract: An FET is fabricated on an SOI substrate by the following processes. Openings are formed in laminated layers of a pad oxide film of about 5-10 nm and an oxidation-resistant nitride film of about 50-150 nm at positions where device isolation regions are to be provided. The substrate is irradiated by an ion implantation apparatus with at least one of Ar ions and Si ions with an implantation energy of 40-50 keV, and a dose of 1×1014 to 5×1015 cm−2. Field oxidation is then conducted to electrically separate adjacent devices. The regions of the substrate where the openings are formed become amorphous when irradiated, and the field oxidation is consequently enhanced. Hence, a thermal oxidation film having sufficient thickness can be obtained even at device isolation regions having isolation widths of 0.2 &mgr;m or less.Type: GrantFiled: June 10, 2002Date of Patent: April 27, 2004Assignee: Oki Electric Industry Co., Ltd.Inventors: Toshiyuki Nakamura, Hideaki Matsuhashi
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Publication number: 20040075142Abstract: A lower buried oxide film, a stress-relief film, an upper buried oxide film, and an SOI film are formed over a semiconductor substrate in this order. The thermal expansion coefficient of the stress-relief film is greater than the thermal expansion coefficient of the upper buried oxide film. The stress-relief film desirably has a thermal expansion coefficient equal to or greater than the thermal expansion coefficient of the SOI film. For example, it is formed of a silicon film, or of a composite film laminating a silicon film, a germanium film disposed thereon, and a silicon film disposed thereon. Accordingly, a semiconductor device having an SOI MOSFET is to be provided, which has excellent characteristics such as low parasitic capacitance and a small S value and is hardly affected by the stress generated by the difference between thermal expansion coefficients of the buried oxide film and the SOI film.Type: ApplicationFiled: June 23, 2003Publication date: April 22, 2004Inventor: Hideaki Matsuhashi
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Publication number: 20030228735Abstract: An FET is fabricated on an SOI substrate by the following processes. Openings are formed in laminated layers of a pad oxide film of about 5-10 nm and an oxidation-resistant nitride film of about 50-150 nm at positions where device isolation regions are to be provided. The substrate is irradiated by an ion implantation apparatus with at least one of Ar ions and Si ions with an implantation energy of 40-50 keV, and a dose of 1×1014 to 5×1015 cm−2. Field oxidation is then conducted to electrically separate adjacent devices. The regions of the substrate where the openings are formed become amorphous when irradiated, and the field oxidation is consequently enhanced. Hence, a thermal oxidation film having sufficient thickness can be obtained even at device isolation regions having isolation widths of 0.2 &mgr;m or less.Type: ApplicationFiled: June 10, 2002Publication date: December 11, 2003Inventors: Toshiyuki Nakamura, Hideaki Matsuhashi
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Publication number: 20030049940Abstract: A field oxide film for element isolation is formed on an SOI substrate having a silicon layer formed on an insulating layer, an active nitride film is wet-etched to reduce its film thickness to a value small enough to allow the edge of the silicon layer to become exposed and ions of a channel stopping impurity are implanted only into the edge of the silicon layer through self-alignment either vertically or at an angle by using the active nitride film as a mask. Through this manufacturing method, a field effect transistor which achieves a small gate length, is free from the adverse effect of a parasitic transistor and thus does not readily manifest a hump, and allows a reduction in the distance between an nMOS and a pMOS provided next to each other is realized.Type: ApplicationFiled: February 15, 2002Publication date: March 13, 2003Inventors: Hideaki Matsuhashi, Yoko Kajita, Yoshihiro Koga, Toshiyuki Nakamura, Jun Kanamori
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Patent number: 6413810Abstract: A fabrication method for fabricating a dual-gate CMOSFET on a semiconductor substrate according to the present invention includes: implanting ions of N-type impurity for forming a deep junction source and drain in a first region on the semiconductor substrate where an NMOSFET is to be formed; performing a first annealing process for activating the N-type impurity; implanting ions of P-type impurity for forming a deep junction source and drain in a second region on the semiconductor substrate where a PMOSFET is to be formed; and performing a second annealing process for activating the P-type impurity. By performing the above processes in that order, the N-type impurity ions in the N+ polysilicon gate electrode of the NMOSFET are sufficiently activated, thus preventing the problem of depletion. Also, fluctuation of a threshold voltage because of penetration of the P-type impurity ions in the gate electrode of the PMOSFET can be prevented in the PMOSFET.Type: GrantFiled: March 13, 2000Date of Patent: July 2, 2002Assignee: Oki Electric Industry Co., Ltd.Inventor: Hideaki Matsuhashi