Abstract: A field effect transistor includes a first etching stop structure and a second etching stop structure. The first etching stop structure is formed on a first side surface of a recess region that is a boundary between a cap layer on a side of a source electrode and the recess region. The second etching stop structure is formed on a second side surface of the recess region that is a boundary between the cap layer on a side of a drain electrode and the recess region.

Abstract: A wiring board includes a dielectric substrate, a ground layer disposed on one surface of the dielectric substrate, a first conductor line and a first ground plane that are disposed apart from each other on the other surface opposing the one surface of the dielectric substrate, and a second conductor line disposed immediately below the first ground plane in the dielectric substrate.

Abstract: A first regrowth layer and a second regrowth layer comprising GaAs having high resistance are regrown on a surface of an etching stop layer exposed to the bottom of a first groove and a second groove, and then n-type InGaAs is regrown on the first regrowth layer and the second regrowth layer, whereby a source region and a drain region configured to make contact with a channel layer are formed in the first groove and the second groove respectively.

Abstract: A gate opening portion, which is disposed within a recess formation region in a state where the distance from a drain electrode is greater than the distance from a source electrode, is formed in an insulating layer. The gate opening portion is a stripe-shaped opening that extends in a gate width direction. Also, a plurality of asymmetric recess-forming opening portions are formed, arranged in a row in the gate width direction between the gate opening portion and the drain electrode within the recess formation region in the insulating layer. In this step, asymmetric recess-forming opening portions are formed whose opening size in the gate length direction is greater than the opening size in the gate width direction.

Abstract: A light-receiving device includes: a plurality of light-receiving elements arranged in a row on a main surface of a substrate and a first reflection surface and a second reflection surface formed on the substrate to extend in the arrangement direction with the row of the plurality of light-receiving elements interposed therebetween. Each of the first reflection surface and the second reflection surface includes an inclined surface forming one flat surface formed from a main surface of the substrate on which each light-receiving element is formed to a back surface side of the substrate.

Abstract: A second protective film is formed on and in contact with a first protective film, and is formed to cover the first protective film. The second protective film is also formed so that an end portion extending toward the center of a first opening is interposed between a wiring line and a bonding pad at the edge portion of the bonding pad.

Abstract: After a nitride semiconductor layer is formed through crystal-growth of a nitride semiconductor containing Ga in a +c-axis direction on the other substrate, the other substrate on which the nitride semiconductor layer is formed is bonded to a substrate in a state where a surface on which the nitride semiconductor layer of the other substrate is formed is on the side of the substrate (a bonding step). This bonding is performed by bonding the surfaces to be bonded by a known direct bonding technology.

Abstract: A substrate, a first n-type contact layer, a buffer layer, a multiplication layer, an electric field control layer, an absorption layer, and a p-type contact layer are provided. An electrically conductive layer is formed in a central portion of the buffer layer. The substrate is made of a semiconductor having thermal conductivity higher than that of InP, such as SiC, and the first n-type contact layer is made of the same semiconductor as that of the substrate but having n-type conductivity. An n electrode is formed over the first n-type contact layer via a second n-type contact layer.

Abstract: A gate opening, a plurality of first openings arranged in a gate widthwise direction and having a reed shape, a second opening connecting the adjacent first openings, and a third opening connected to a side away from the arrangement of the first opening at an end of the arrangement are formed in an insulation layer. An ohmic cap layer is etched via the openings to form an asymmetric recess region.

Abstract: A groove is formed around a chip region of a principal surface of a substrate by an etching process or cutting with a dicing blade (a second step). Next, the substrate is thinned from a back-surface side of the substrate to cause a bottom of the groove to reach a backside of the substrate to serve as a space, thus cutting out a portion that is to be a chip of the chip region (a third step).

Abstract: A semiconductor device includes a first heat sink formed in contact with a back surface of a first semiconductor chip, and a second heat sink formed in contact with a back surface of a second semiconductor chip. The first heat sink is made of a material with larger thermal conductivity than that of the first semiconductor chip and has a heat dissipation surface exposed from the mold resin layer to the outside. The second heat sink is made of a material with larger thermal conductivity than that of the second semiconductor chip and has a heat dissipation surface exposed from the mold resin layer to the outside.

Abstract: A light-receiving device includes a light-receiving element formed on a main surface of a substrate, a light incidence surface formed on a side portion of the substrate at an acute angle or an obtuse angle with respect to the plane of the substrate and having an inclined surface forming one plane, and a lens for focusing light incident on the light-receiving element. The lens is disposed at a position where the light incident from the light incidence surface is reflected on a side of a back surface of the substrate.

Abstract: A semiconductor device (field effect transistor) includes a gate insulating layer between both of a bottom part and a lateral surface of a recess part and a penetration portion of a gate electrode. The gate insulating layer is composed of an oxide of a substance which a barrier layer is composed of For example, the gate insulating layer is composed of a layer of In oxide and a layer of Al oxide.

Abstract: A gate electrode includes a main portion formed of a gate electrode material, and a gate electrode barrier layer disposed between the main portion and a barrier layer and formed of a conductive material that prevents the gate electrode material from diffusing into the barrier layer. A surface of the main portion in a region above a first insulating layer faces a periphery without a layer of the conductive material being formed.

Abstract: A first barrier layer, a channel layer, a second barrier layer, and a first bonding layer made of high-resistance AlGaN doped with Fe are formed on a first substrate. Thereafter, the first substrate and the second substrate are pasted in a state where the first bonding layer and a second bonding layer made of high-resistance GaN doped with Fe are opposed to each other.

Abstract: An impedance converter includes a dielectric substrate, a ground layer formed on a rear surface of the dielectric substrate, and a signal line formed in a layer from an inside to a front surface of the dielectric substrate with a distance to the ground layer gradually changed along a signal transfer direction. The signal line includes a plurality of lines stacked in the layer from the inside to the front surface of the dielectric substrate with the distance to the ground layer gradually changed along the signal transfer direction.

Abstract: An emitter contact layer, an emitter layer, a base layer, a p-type base layer, a collector layer, and a sub-collector layer are crystal-grown over a first substrate in this order with the main surface as the Group III polar surface. The emitter contact layer includes a nitride semiconductor that is made n-type at a relatively high concentration. The emitter layer includes a nitride semiconductor having a bandgap larger than that of the nitride semiconductor constituting the emitter contact layer. The base layer includes an undoped nitride semiconductor having a bandgap smaller than that of the nitride semiconductor constituting the emitter layer. The p-type base layer includes the same nitride semiconductor as the base layer and made p-type.

Abstract: A gate opening, a plurality of first openings arranged in a gate widthwise direction and having a reed shape, a second opening connecting the adjacent first openings, and a third opening connected to a side away from the arrangement of the first opening at an end of the arrangement are formed in an insulation layer. An ohmic cap layer is etched via the openings to form an asymmetric recess region.

Abstract: A method for manufacturing a monolithically integrated semiconductor optical integrated element comprising a DFB laser, an EA modulator, and a SOA disposed in a light emitting direction, comprising the step of forming a semiconductor wafer on which the elements are two-dimensionally arrayed and aligned the optical axes; cleaving the semiconductor wafer along a plane orthogonal to the light emitting direction to form a semiconductor bar including a plurality of the elements arranged one-dimensionally along a direction orthogonal to the light emitting direction such that the elements adjacent to each other share an identical cleavage end face as a light emission surface; inspecting the semiconductor bar by driving the SOA and the DFB laser through a connection wiring part together; and separating out the semiconductor bar after the inspection to cut the connection wiring part connecting the electrode of the SOA and the DFB laser to isolate from each other.

Abstract: A light-receiving device includes: a plurality of light-receiving elements arranged in a row on a main surface of a substrate and a first reflection surface and a second reflection surface formed on the substrate to extend in the arrangement direction with the row of the plurality of light-receiving elements interposed therebetween. Each of the first reflection surface and the second reflection surface includes an inclined surface forming one flat surface formed from a main surface of the substrate on which each light-receiving element is formed to a back surface side of the substrate.