Abstract: A bonded object production method according to an embodiment uses a continuous furnace to process a stacked body including a metal member, a ceramic member, and a brazing material layer located therebetween, while conveying the stacked body; and the method includes a process of heating the stacked body in an inert atmosphere from 200° C. to a bonding temperature at an average temperature raising rate of the stacked body of not less than 15° C./min, a process of bonding the stacked body in an inert atmosphere at the bonding temperature that is within a range of not less than 600° C. and not more than 950° C., and a process of cooling the stacked body from the bonding temperature to 200° C. at an average temperature lowering rate of the stacked body of not less than 15° C./min. A ceramic substrate is favorably a silicon nitride substrate.

Abstract: A repairing method using a lance for repairing an oven wall surface of a coke oven comprises the steps of arranging a distance sensor at a top end of the lance, quantitatively measuring a depth of a worn or a damaged area by the distance sensor, and blowing a repairing material from a repairing nozzle to the worn area in accordance with a measurement result to thereby repair the worn area. The lance used in this repairing method has a multistage structure having a polygonal cross section and is extendable. With this structure, the oven wall surface can be scanned in a linear fashion or along a plane. If the top end of the lance is movable in accordance with a basic motion pattern and/or a travelling pattern, it is possible to readily repair a repair range having a complicated shape.

Abstract: A system applicable to a digital radio communication system for switching a regular channel and a standby channel includes a demodulator associated with the standby channel. The demodulator has a phase locked loop for clock recovery the band width of which is variable. The band width of the phase lock loop is increased only when a channel switching operation is under way so as to guarantee clock synchronization.

Abstract: A system applicable to a digital radio communication system for switching a regular channel and a standby channel includes a demodulator associated with the standby channel. The demodulator has a phase locked loop for clock recovery the band width of which is variable. The band width of the phase lock loop is increased only when a channel switching operation is under way so as to guarantee clock synchronization.

Abstract: In a digital radio communication system using at least two regular channel and two or more standby channels for transmitting a test signal therethrough in the standby condition thereby permitting the regular channel to be synchronously switched to one of the standby channels, the improvement wherein a channel switching system for monitoring the standby channels is provided at the receiving side of the digital communication system with: control signal generator means operating so that when two or more standby channels are in standby condition, it generates a control signal to designate them in turn, and when only one standby channel is in standby condition, it generates a control signal to designate the channel; synchronizing switching means for selectively outputting the test signal transmitted via each of the standby channels designated by the control signal; and standby channel monitoring means for detecting an output from the synchronizing switching means to monitor the communication quality of the standby

Abstract: A digital radio transmission system comprises a transmit digital processing unit that compresses the time scale of a prescribed number of consecutive data bits for leaving a time interval between adjacent time-compressed data bits, generates an additional bit and inserts it into a portion of the time interval immediately following the time-compressed data bits to form composite bits. An error correcting encoder performs computations on the composite bits according to an encoding theorem and inserts an error correcting code into the remainder of the time interval, forming a block code. An error correcting decoder performs computations on the block code according to a decoding theorem for correcting error in the composite bits. A receive digital processing unit separates the additional bit and the time-compressed data bits of the error-corrected composite bits and expands the time scale of the separated time-compressed data bits.

Abstract: A channel switching system includes a synchronizing switch circuit including: two converters for monitoring input data signals respectively supplied through a regular channel and a stand-by channel, and when continuation of a predetermined number of bits having the same value is detected, outputting data signals for comparison in accordance with a predetermined rule; and a bit comparator for reading out the comparison data signals in response to a common clock signal, comparing bits of the data signals, sequentially changing the order of signal lines of either of the regular channel and the stand-by channel when a bit noncoincidence is detected, and supplying a control signal which instructs channel switching when a bit coincidence is detected.

Abstract: A channel switching system in a digital radio transmission circuit with at least one regular channel and a standby channel has a received signal supply circuit, signal frequency divider circuits, signal order change circuits, a comparator, a hitless signal switching circuit and a frequency multiplier. Each channel transmits a digital multiplexed signal including a data signal of N (N is an integer of 1 or more) strings. The received signal supply circuit supplies a data signal to a receiving-side regular channel through a standby channel when a corresponding transmitting-side regular channel has a circuit failure. The signal frequency divider circuits N frequency-divide a data signal received through a regular channel and the data signal received through the received signal supply circuit. The signal order change circuits change orders of the N signal strings in response to different signal order change signals.

Abstract: A channel switching method and system for a digital communication system including a repeater station linked with first and second stations and including first and second regular channels and a standby channel in each direction between the repeater station the first and second stations, one of the regular channels being a regenerative relay channel and the other being a dropping/insertion channel. A first control signal is generated upon the detections of a fault on the first regular channel and a non-fault on the standby channel at the second station. A first control signal is then transmitted from the second station to the first station through the repeater station. The second station is then informed of the presence or absence of a fault on the standby channel between the first station and the repeater station by at least the first control signal.