Patents by Inventor Hideaki Nada
Hideaki Nada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10620064Abstract: A pressure sensor is disclosed. The pressure sensor includes a common electrode, a plurality of individual electrodes, a plurality of thin-film transistors and a common pressure-sensitive layer. The common electrode is formed as a layer. The plurality of individual electrodes are arranged in a matrix opposing the common electrode. The plurality of thin-film transistors are respectively located corresponding to the individual electrodes on sides of the individual electrodes opposite to the common electrode, where one or two or more adjacent thin-film transistors are connected to one individual electrode. The common pressure-sensitive layer is disposed on a surface of the common electrode on a side facing the plurality of individual electrodes. The plurality of individual electrodes include a first electrode, and a second electrode that is thicker than the first electrode and therefore creates a smaller gap from the common pressure-sensitive layer than the first electrode.Type: GrantFiled: August 24, 2017Date of Patent: April 14, 2020Assignee: NISSHA CO., LTD.Inventors: Hideaki Nada, Jumpei Morita
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Patent number: 10605679Abstract: A pressure sensor is disclosed. The pressure sensor includes a common electrode, sensitized electrodes, mountain-shaped pressure-sensitive layers, and thin-film transistors. The common electrode is formed as a layer. The sensitized electrodes are arranged in a matrix opposing the common electrode. The mountain-shaped pressure-sensitive layers are respectively formed over the sensitized electrodes on a side close to the common electrode. The thin-film transistors are disposed to correspond to the sensitized electrodes on sides of the sensitized electrodes opposite to the common electrode.Type: GrantFiled: August 29, 2017Date of Patent: March 31, 2020Assignee: NISSHA CO., LTD.Inventor: Hideaki Nada
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Patent number: 10527938Abstract: [Object] To provide a method for producing an electrical wiring member having a layered structure of copper wiring and a blackening layer and to provide the electrical wiring member through a search for a material for the blackening layer, the material being etched at a rate close to that for the copper wiring under conditions where etching controllability is ensured. [Solution] A method for producing an electrical wiring member according to the present invention includes a step of forming, on at least one main surface of a substrate, a layered film 6 of a Cu layer 3 and CuNO-based blackening layers (2a and 2b); a step of forming a resist layer 4a in a predetermined region on the layered film 6; and a step of removing a partial region of the layered film 6 by bringing the layered film 6 into contact with an etchant.Type: GrantFiled: October 22, 2015Date of Patent: January 7, 2020Assignee: NISSHA CO., LTD.Inventors: Hideaki Nada, Hiroaki Uefuji, Hirotaka Shigeno, Yoshihiro Sakata, Yuki Matsui, Hisaya Takayama
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Publication number: 20190234818Abstract: A pressure sensor includes a first insulating base material, a common electrode formed to extend on a principal surface of the first insulating base material, a second insulating base material disposed to face the principal surface of the first insulating base material, a plurality of individual electrodes provided in a paved manner facing the common electrode, over a principal surface of the second insulating base material on a side of the first insulating base material, a pressure sensitive layer overlaid on at least one of the plurality of individual electrodes and the common electrode, a plurality of thin film transistors provided on a side opposite to the principal surface of the second insulating base material, and first individual spacers and second individual spacers disposed among the plurality of individual electrodes on the principal surface of the second insulating base material to face the common electrode.Type: ApplicationFiled: October 31, 2017Publication date: August 1, 2019Inventors: Hideaki NADA, Atsuo INOUE
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Publication number: 20190219462Abstract: A pressure sensor is disclosed. The pressure sensor includes a common electrode, a plurality of individual electrodes, a plurality of thin-film transistors and a common pressure-sensitive layer. The common electrode is formed as a layer. The plurality of individual electrodes are arranged in a matrix opposing the common electrode. The plurality of thin-film transistors are respectively located corresponding to the individual electrodes on sides of the individual electrodes opposite to the common electrode, where one or two or more adjacent thin-film transistors are connected to one individual electrode. The common pressure-sensitive layer is disposed on a surface of the common electrode on a side facing the plurality of individual electrodes. The plurality of individual electrodes include a first electrode, and a second electrode that is thicker than the first electrode and therefore creates a smaller gap from the common pressure-sensitive layer than the first electrode.Type: ApplicationFiled: August 24, 2017Publication date: July 18, 2019Inventors: Hideaki NADA, Jumpei MORITA
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Publication number: 20190219461Abstract: A pressure sensor is disclosed. The pressure sensor includes a common electrode, sensitized electrodes, mountain-shaped pressure-sensitive layers, and thin-film transistors. The common electrode is formed as a layer. The sensitized electrodes are arranged in a matrix opposing the common electrode. The mountain-shaped pressure-sensitive layers are respectively formed over the sensitized electrodes on a side close to the common electrode. The thin-film transistors are disposed to correspond to the sensitized electrodes on sides of the sensitized electrodes opposite to the common electrode.Type: ApplicationFiled: August 29, 2017Publication date: July 18, 2019Inventor: Hideaki NADA
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Patent number: 10008604Abstract: [Object] The present invention provides an active device in which the misalignment of a partition relative to electrodes is reduced and a method for manufacturing an active device. [Solution] An active device according to the present invention includes a substrate 2, a first electrode 5 and a second electrode 6 formed adjacent to each other on one main surface of the substrate 2, an organic semiconductor layer 9 formed on the one main surface of the substrate 2 at least over a region between the first electrode 5 and the second electrode 6, and a partition 12 formed on the one main surface of the substrate 2 in a region that is located outside the organic semiconductor layer 9 in a planar direction and that is different from regions where the first electrode 5 and the second electrode 6 are formed. The partition 12 is formed of a conductive material.Type: GrantFiled: August 4, 2016Date of Patent: June 26, 2018Assignee: NISSHA PRINTING CO., LTD.Inventor: Hideaki Nada
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Publication number: 20180114862Abstract: A method for producing a thin film transistor and a thin film transistor that can suppress deterioration and variation in performance are provided. A method for producing a thin film transistor includes: forming an oxide semiconductor layer on a first main surface of a substrate; forming a first conductive layer on the oxide semiconductor layer, while forming a second conductive layer on a second main surface of the substrate; forming mask layers collectively on the first conductive layer and the second conductive layer; and bringing the first conductive layer and the second conductive layer collectively into contact with etching liquid so that partial regions of the first conductive layer and the second conductive layer are removed, so as to form a source electrode and a drain electrode on the oxide semiconductor layer, while forming a gate electrode on the second main surface of the substrate.Type: ApplicationFiled: March 2, 2016Publication date: April 26, 2018Inventors: Hideaki NADA, Ryomei OMOTE, Hirotaka SHIGENO, Yoshihiro SAKATA, Shuzo OKUMURA
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Publication number: 20180090609Abstract: [Object] The present invention provides an active device in which the misalignment of a partition relative to electrodes is reduced and a method for manufacturing an active device. [Solution] An active device according to the present invention includes a substrate 2, a first electrode 5 and a second electrode 6 formed adjacent to each other on one main surface of the substrate 2, an organic semiconductor layer 9 formed on the one main surface of the substrate 2 at least over a region between the first electrode 5 and the second electrode 6, and a partition 12 formed on the one main surface of the substrate 2 in a region that is located outside the organic semiconductor layer 9 in a planar direction and that is different from regions where the first electrode 5 and the second electrode 6 are formed. The partition 12 is formed of a conductive material.Type: ApplicationFiled: August 4, 2016Publication date: March 29, 2018Inventor: Hideaki Nada
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Publication number: 20180061643Abstract: A method for producing a thin film transistor and a thin film transistor that can suppress deterioration and variation in performance are provided. A method for producing a thin film transistor includes: forming an organic semiconductor layer on a first main surface of a substrate; forming a first conductive layer on the organic semiconductor layer, while forming a second conductive layer on a second main surface of the substrate; forming mask layers collectively on the first conductive layer and the second conductive layer; and bringing the first conductive layer and the second conductive layer collectively into contact with etching liquid so that partial regions of the first conductive layer and the second conductive layer are removed, so as to form a source electrode and a drain electrode on the organic semiconductor layer, while to form a gate electrode on the second main surface of the substrate.Type: ApplicationFiled: March 2, 2016Publication date: March 1, 2018Applicant: NISSHA PRITING CO., LTD.Inventors: Hideaki NADA, Ryomei OMOTE, Hirotaka SHIGENO, Yoshihiro SAKATA, Kazuto NAKAMURA, Hayato NAKAYA
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Publication number: 20170307974Abstract: [Object] To provide a method for producing an electrical wiring member having a layered structure of copper wiring and a blackening layer and to provide the electrical wiring member through a search for a material for the blackening layer, the material being etched at a rate close to that for the copper wiring under conditions where etching controllability is ensured. [Solution] A method for producing an electrical wiring member according to the present invention includes a step of forming, on at least one main surface of a substrate, a layered film 6 of a Cu layer 3 and CuNO-based blackening layers (2a and 2b); a step of forming a resist layer 4a in a predetermined region on the layered film 6; and a step of removing a partial region of the layered film 6 by bringing the layered film 6 into contact with an etchant.Type: ApplicationFiled: October 22, 2015Publication date: October 26, 2017Inventors: Hideaki Nada, Hiroaki Uefuji, Hirotaka Shigeno, Yoshihiro Sakata, Yuki Matsui, Hisaya Takayama