Patents by Inventor Hideaki Omura

Hideaki Omura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8001344
    Abstract: Disclosed are a storage control apparatus, a storage control program, and a storage control method that collect the backup of storage data in units of generation at low cost. A storage control apparatus that creates a generation backup of a storage, comprising: a first copy section that creates a snapshot of at least one of all data stored in the storage at an indicated time point and difference data stored in the storage in an indicated time period; a second copy section that creates a mirror of at least one of all data stored in the storage and difference data stored in the storage in an indicated time period; and a controller that causes one of the first and second copy sections to copy all data stored in the storage and causes the other to copy difference data between generations stored in the storage.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: August 16, 2011
    Assignee: Fujitsu Limited
    Inventors: Koji Uchida, Hideaki Omura, Yasuhito Arikawa
  • Patent number: 7945749
    Abstract: A copy source device includes bit map acquisition and bit map merge functions. In accordance with bit-map management information in which a bit map indicating the presence of written data is rounded, the bit map acquisition and bit map merger acquires required bit map from a copy destination device, and merges the acquired bit map to a corresponding bit map of the copy source device. The copy destination device includes bit-map management information updater. The bit-map management information updater updates bit-map management information indicating a write operation when the write operation has been performed during a copy suspend mode. During a copy resume mode, the copy source device requests the copy destination device to transfer the bit-map management information, and in response, the copy destination device transfers the bit-map management information.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: May 17, 2011
    Assignee: Fujitsu Limited
    Inventors: Yoshinari Shinozaki, Hideaki Omura, Koji Uchida, Mihoko Wada
  • Patent number: 7657719
    Abstract: A disk array device includes a controller that sets a session pertaining to a copy source disk and a copy destination disk, and without copying the entire data that is recorded in the copy source disk to the copy destination disk, copies to the copy destination disk only the data that is recorded in a data space for writing. Further, if data for reading does not exist in the copy destination disk, the controller searches data from the copy source disk and transfers the searched data to a host computer.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: February 2, 2010
    Assignee: Fujitsu Limited
    Inventors: Koji Uchida, Hideaki Omura, Tsutomu Akasaka
  • Patent number: 7567514
    Abstract: An interdevice communication monitoring unit 62-1 calculates a variable timeout time (T2?T) by subtracting an elapsed time T from a predetermined fixed timeout time T2 for monitoring an intermodule communication to monitor an elapsed time of an intermodule communication. The fixed timeout time T2 is a time shorter than a predetermined interface connection check time T1 for monitoring an interface connection with a channel. When the elapsed time T of the intermodule communication exceeds the variable timeout time (T2?T), the interdevice communication monitoring unit requests a channel to separate the interface connection, and then when an end response is obtained from a control module, requests the channel for an interface reconnection and then transmits an end response.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: July 28, 2009
    Assignee: Fujitsu Limited
    Inventors: Akihito Kobayashi, Hidenori Yamada, Katsuhiko Nagashima, Hideaki Omura, Koji Uchida, Shinichi Nishizono
  • Patent number: 7421536
    Abstract: An access control method receives an access command, and permitting access to a cache segment accessed by the access command if no access range overlap occurs, even when a contention exists between a cache segment and an arbitrary cache segment that is already being accessed. The cache memory is segmented into the cache segments.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: September 2, 2008
    Assignee: Fujitsu Limited
    Inventor: Hideaki Omura
  • Publication number: 20070294495
    Abstract: Disclosed are a storage control apparatus, a storage control program, and a storage control method that collect the backup of storage data in units of generation at low cost. A storage control apparatus that creates a generation backup of a storage, comprising: a first copy section that creates a snapshot of at least one of all data stored in the storage at an indicated time point and difference data stored in the storage in an indicated time period; a second copy section that creates a mirror of at least one of all data stored in the storage and difference data stored in the storage in an indicated time period; and a controller that causes one of the first and second copy sections to copy all data stored in the storage and causes the other to copy difference data between generations stored in the storage.
    Type: Application
    Filed: October 30, 2006
    Publication date: December 20, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Koji Uchida, Hideaki Omura, Yasuhito Arikawa
  • Publication number: 20070146788
    Abstract: A copy source device includes bit map acquisition and bit map merge functions. In accordance with bit-map management information in which a bit map indicating the presence of written data is rounded, the bit map acquisition and bit map merger acquires required bit map from a copy destination device, and merges the acquired bit map to a corresponding bit map of the copy source device. The copy destination device includes bit-map management information updater. The bit-map management information updater updates bit-map management information indicating a write operation when the write operation has been performed during a copy suspend mode. During a copy resume mode, the copy source device requests the copy destination device to transfer the bit-map management information, and in response, the copy destination device transfers the bit-map management information.
    Type: Application
    Filed: September 29, 2006
    Publication date: June 28, 2007
    Applicant: Fujitsu Limited
    Inventors: Yoshinari Shinozaki, Hideaki Omura, Koji Uchida, Mihoko Wada
  • Publication number: 20070143554
    Abstract: A disk array device includes a controller that sets a session pertaining to a copy source disk and a copy destination disk, and without copying the entire data that is recorded in the copy source disk to the copy destination disk, copies to the copy destination disk only the data that is recorded in a data space for writing. Further, if data for reading does not exist in the copy destination disk, the controller searches data from the copy source disk and transfers the searched data to a host computer.
    Type: Application
    Filed: March 31, 2006
    Publication date: June 21, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Koji Uchida, Hideaki Omura, Tsutomu Akasaka
  • Publication number: 20070005885
    Abstract: An interdevice communication monitoring unit 62-1 calculates a variable timeout time (T2?T) by subtracting an elapsed time T from a predetermined fixed timeout time T2 for monitoring an intermodule communication to monitor an elapsed time of an intermodule communication. The fixed timeout time T2 is a time shorter than a predetermined interface connection check time T1 for monitoring an interface connection with a channel. When the elapsed time T of the intermodule communication exceeds the variable timeout time (T2?T), the interdevice communication monitoring unit requests a channel to separate the interface connection, and then when an end response is obtained from a control module, requests the channel for an interface reconnection and then transmits an end response.
    Type: Application
    Filed: September 20, 2005
    Publication date: January 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Akihito Kobayashi, Hidenori Yamada, Katsuhiko Nagashima, Hideaki Omura, Koji Uchida, Shinichi Nishizono
  • Publication number: 20060047901
    Abstract: An access control method receives an access command, and permitting access to a cache segment accessed by the access command if no access range overlap occurs, even when a contention exists between a cache segment and an arbitrary cache segment that is already being accessed. The cache memory is segmented into the cache segments.
    Type: Application
    Filed: November 30, 2004
    Publication date: March 2, 2006
    Applicant: FUJITSU LIMITED
    Inventor: Hideaki Omura
  • Patent number: 6615313
    Abstract: An input/output control device uses all of its cache memory effectively and allows cache memory modules to be added in increments of one. When cache memory included in the input/output control device is operating normally and the input/output control device receives a write request from a processing device, the input/output control device returns a write request completed response after writing data to cache memory as set forth in configuration information included in the input/output control device. The write data in the cache memory is then written to one or more disk devices asynchronously with the write completed response. When there is a problem with a cache memory module, the write data that was to be written to the region controlled by the cache memory module where the problem occurred is divided among the remaining cache memory modules.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: September 2, 2003
    Assignee: Fujitsu Limited
    Inventors: Tadaomi Kato, Hideaki Omura, Hiromi Kubota
  • Patent number: 6360296
    Abstract: File control apparatus adapted to be operatively connected to a host device for controlling a plurality of memory devices includes a cache memory for storing data blocks sent to or retrieved from the at least one memory device by the host. A control unit controls data transfer between the memory devices and the cache memory. A continuous data information generating device is included for generating continuous data information indicating whether the data blocks from the same memory device are updated continuously The control unit stores the continuously updated data blocks from the same memory device back to that same memory device as a single data block in accordance with a least recently used (LRU) scheme.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: March 19, 2002
    Assignee: Fujitsu Limited
    Inventors: Hiromi Kubota, Hideaki Omura
  • Publication number: 20010049768
    Abstract: An input/output control device uses all of its cache memory effectively and allows cache memory modules to be added in increments of one. When cache memory included in the input/output control device is operating normally and the input/output control device receives a write request from a processing device, the input/output control device returns a write request completed response after writing data to cache memory as set forth in configuration information included in the input/output control device. The write data in the cache memory is then written to one or more disk devices asynchronously with the write completed response. When there is a problem with a cache memory module, the write data that was to be written to the region controlled by the cache memory module where the problem occurred is divided among the remaining cache memory modules.
    Type: Application
    Filed: February 9, 2001
    Publication date: December 6, 2001
    Inventors: Tadaomi Kato, Hideaki Omura, Hiromi Kubota
  • Patent number: 5512800
    Abstract: In a metal halide lamp container 1 sealed with mercury and rare gas, GdX.sub.3, LuX.sub.3, and CsX where halogen is iodine, bromine, or their mixture are sealed in a total weight of 1 mg/cc or more, with the weight of CsX defined within a range of 15% or more to 50% or less of the total halides, and the weight ratio of GdX.sub.3 and LuX.sub.3 is set in a range of 0.1.ltoreq.GdX.sub.3 /LuX.sub.3 .ltoreq.10. In addition to GdX.sub.3, LuX.sub.3, and CsX, at least one of thallium halide and dysprosium halide is added. Or DyX.sub.3, LuX.sub.3, NdX.sub.3, and CsX where halogen is iodine, bromine or their mixture are sealed in the specified total weight, with the weight ratio of CsX defined in the above range.
    Type: Grant
    Filed: July 13, 1994
    Date of Patent: April 30, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideaki Omura, Masayuki Wakamiya, Munehiro Tabata, Nobuyoshi Takeuchi