Abstract: A semiconductor device includes: a semiconductor layer of a first conductivity type; a first electrode located on the semiconductor layer; a second electrode located on the semiconductor layer; a third electrode located on the semiconductor layer between the first electrode and the second electrode, and separated from them; a first semiconductor region that is located in the semiconductor layer and is of a second conductivity type; a first cathode region of the first conductivity type; a first anode region of the second conductivity type; a second cathode region of the first conductivity type; a second anode region of the second conductivity type; a third anode region of the second conductivity type; a third cathode region of the first conductivity type; a second semiconductor region of the second conductivity type; a fourth anode region of the second conductivity type; and a fourth cathode region of the first conductivity type.

Abstract: An eighth semiconductor portion is provided between the first semiconductor portion and the third semiconductor portion. The eighth semiconductor portion is of the second conductivity type, contacting the first semiconductor portion, and having a lower second-conductivity-type impurity concentration than the second semiconductor portion.

Abstract: A semiconductor device includes: a semiconductor layer of a first conductivity type; a first electrode located on the semiconductor layer; a second electrode located on the semiconductor layer; a third electrode located on the semiconductor layer between the first electrode and the second electrode, and separated from them; a first semiconductor region that is located in the semiconductor layer and is of a second conductivity type; a first cathode region of the first conductivity type; a first anode region of the second conductivity type; a second cathode region of the first conductivity type; a second anode region of the second conductivity type; a third anode region of the second conductivity type; a third cathode region of the first conductivity type; a second semiconductor region of the second conductivity type; a fourth anode region of the second conductivity type; and a fourth cathode region of the first conductivity type.

Abstract: An eighth semiconductor portion is provided between the first semiconductor portion and the third semiconductor portion. The eighth semiconductor portion is of the second conductivity type, contacting the first semiconductor portion, and having a lower second-conductivity-type impurity concentration than the second semiconductor portion.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer that has first and second plane and includes first-conductivity-type first semiconductor region, second-conductivity-type second semiconductor region between the first semiconductor region and the first plane, first-conductivity-type third semiconductor region between the second semiconductor region and the first plane and has a lower first-conductivity-type impurity concentration than the first semiconductor region, and second-conductivity-type fourth semiconductor region between the third semiconductor region and the first plane and has a higher second-conductivity-type impurity concentration than the second semiconductor region; a first electrode on a side of the first plane of the semiconductor layer and is electrically connected to the third semiconductor region and the fourth semiconductor region; and a second electrode on a side of the second plane of the semiconductor layer, is electrically connected to the first semicond

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer having first and second plane, a first conductivity-type first semiconductor region, a second conductivity-type second semiconductor region between the first semiconductor region and the first plane, a first conductivity-type third semiconductor region between the second semiconductor region and the first plane, a second conductivity-type fourth semiconductor region between the third semiconductor region and the first plane, a first conductivity-type fifth semiconductor region provided between the first semiconductor region and the first plane, a first electrode provided on a side of the first plane, and electrically connected to the third semiconductor region and the fourth semiconductor region, a second electrode provided on a side of the second plane, and electrically connected to the first semiconductor region, and a conductive layer provided on a side of the first plane, and electrically connecting the second and the fifth s

Abstract: A semiconductor device according to as embodiment includes a semiconductor layer that has first and second plane and includes first-conductivity-tom e first semiconductor region, second-conductivity-tom e second semiconductor region between the first semiconductor region and the first plane, first-conductivity-type third semiconductor region between the second semiconductor region and the first plane and has a lower first-conducivity type impurity concentration than the first semiconductor region, and second-conductivity-type fourth semiconductor region between the third semiconductor region.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer having first and second plane, a first conductivity-type first semiconductor region, a second conductivity-type second semiconductor region between the first semiconductor region and the first plane, a first conductivity-type third semiconductor region between the second semiconductor region and the first plane, a second conductivity-type fourth semiconductor region between the third semiconductor region and the first plane, a first conductivity-type fifth semiconductor region provided between the first semiconductor region and the first plane, a first electrode provided on a side of the first plane, and electrically connected to the third semiconductor region and the fourth semiconductor region, a second electrode provided on a side of the second plane, and electrically connected to the first semiconductor region, and a conductive layer provided on a side of the first plane, and electrically connecting the second and the fifth s

Abstract: A semiconductor device includes a first diode having a cathode connected to a first terminal, a second diode having a cathode connected to a second terminal and an anode connected to an anode of the first diode, a third diode having an anode connected to the first terminal and the cathode of the first diode, a fourth diode having an anode connected to the second terminal and the anode of the second diode and a cathode connected to a cathode of the third diode, and a fifth diode having an anode connected to the anode of the first diode and the anode of the second diode and a cathode connected to the cathode of the third diode and the fourth diode. A breakdown voltage of the fifth diode is lower than the breakdown voltages of the first diode, the second diode, the third diode, and the fourth diode.

Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type, and first and second electrodes on the layer. A first region of the first type is between the layer and the first electrode and contacting the first electrode. A second region of a second conductivity type is between the layer and the second electrode. A third region of the second type is connected to the second electrode, between the first and second regions, and between the layer and the second electrode. A fourth region of the first type is between the second region and the second electrode and contacting the second electrode. A fifth region of the second type is between the layer and the second region and has an impurity concentration greater than the second region and the third region. A sixth region of the first type is between the second region and the third region.

Abstract: A semiconductor device includes first and second semiconductor regions, and a third semiconductor region between the first and second semiconductor regions, wherein the dopant concentration of the third semiconductor region is greater than the dopant concentration of the second semiconductor region. The semiconductor device further includes a fourth semiconductor region selectively provided on an upper surface of the second semiconductor region, wherein a portion of the second semiconductor region is interposed between the third semiconductor region and the fourth semiconductor region, an insulating layer disposed on the second semiconductor region and the fourth semiconductor region and having an opening that exposes a portion of a top surface of the fourth semiconductor region, wherein the ratio of an area of opening to an area of the top surface is from 10% to 90%, and a wiring layer on the insulating layer and connected to the fourth semiconductor region via the opening.

Abstract: A semiconductor device includes first and second semiconductor regions, and a third semiconductor region between the first and second semiconductor regions, wherein the dopant concentration of the third semiconductor region is greater than the dopant concentration of the second semiconductor region. The semiconductor device further includes a fourth semiconductor region selectively provided on an upper surface of the second semiconductor region, wherein a portion of the second semiconductor region is interposed between the third semiconductor region and the fourth semiconductor region, an insulating layer disposed on the second semiconductor region and the fourth semiconductor region and having an opening that exposes a portion of a top surface of the fourth semiconductor region, wherein the ratio of an area of opening to an area of the top surface is from 10% to 90%, and a wiring layer on the insulating layer and connected to the fourth semiconductor region via the opening.

Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type selectively provided on a surface of the first semiconductor region, an insulating layer provided on the first semiconductor region and on the second semiconductor region, and having a first opening exposing a portion of the second semiconductor region therein, a wiring layer on the insulating layer and electrically connected to the second semiconductor region through the first opening, and a third semiconductor region of the second conductivity type below the insulating layer and contacting the first semiconductor region.

Abstract: A semiconductor device includes a first terminal and a second terminal at which a signal line is attachable. A first diode is connected between the first and second terminals with an anode connected to the first terminal. A second diode and a third diode are connected in series with each other and in parallel with the first diode between the first and second terminals. The second diode has an anode connected to the second terminal, and the third diode has an anode connected to the first terminal. The third diode is a Zener diode having a capacitance that is greater than each of a capacitance of the first diode and a capacitance of the second diode. A fourth diode is optionally included in series with the first diode or in series between the second and third diodes.

Abstract: A semiconductor device includes a semiconductor substrate, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first electrode, and a second electrode. The semiconductor substrate is of a first conductivity type. The first semiconductor layer is of a second conductivity type, provided on the semiconductor substrate. The second semiconductor layer is of a first conductivity type, reaches the semiconductor substrate from a surface of the first semiconductor layer, and surrounds the first semiconductor layer. The third semiconductor layer is of a second conductivity type, separated from the second semiconductor layer, surrounded by the second semiconductor layer, and has a higher concentration of second-conductivity-type impurities than the first semiconductor layer.

Abstract: According to one embodiment, the semiconductor device according to the embodiment of the present disclosure is provided with a first semiconductor layer, a second semiconductor layer, a ninth semiconductor layer formed on the second semiconductor layer, a third semiconductor layer, a first region enclosed with the third semiconductor layer, a fourth semiconductor layer, a second region on the second semiconductor layer, a fifth semiconductor layer, a sixth semiconductor layer, a first terminal connected to the first semiconductor layer, and a second terminal connected to the fifth semiconductor layer and the sixth semiconductor layer.

Abstract: A semiconductor apparatus includes an internal circuit, a CMOS composed of a P-channel MOS transistor with a source connected to a high-potential power supply line and a gate connected to the internal circuit, and an N-channel MOS transistor with a source connected to a low-potential power supply line and a gate connected to the internal circuit, an output terminal connected to a drain of the P-channel MOS transistor and a drain of the N-channel MOS transistor and a protection transistor with a source and a gate connected to one power supply line of the high-potential power supply line and the low-potential power supply line and a drain connected to the output terminal, a conductivity type of the protection transistor being the same as a conductivity type of one MOS transistor of the P-channel MOS transistor and the N-channel MOS transistor, the source of the one MOS transistor being connected to the one power supply line.

Abstract: A semiconductor apparatus includes an internal circuit, a CMOS composed of a P-channel MOS transistor with a source connected to a high-potential power supply line and a gate connected to the internal circuit, and an N-channel MOS transistor with a source connected to a low-potential power supply line and a gate connected to the internal circuit, an output terminal connected to a drain of the P-channel MOS transistor and a drain of the N-channel MOS transistor and a protection transistor with a source and a gate connected to one power supply line of the high-potential power supply line and the low-potential power supply line and a drain connected to the output terminal, a conductivity type of the protection transistor being the same as a conductivity type of one MOS transistor of the P-channel MOS transistor and the N-channel MOS transistor, the source of the one MOS transistor being connected to the one power supply line.

Abstract: A semiconductor apparatus includes an internal circuit, a CMOS composed of a P-channel MOS transistor with a source connected to a high-potential power supply line and a gate connected to the internal circuit, and an N-channel MOS transistor with a source connected to a low-potential power supply line and a gate connected to the internal circuit, an output terminal connected to a drain of the P-channel MOS transistor and a drain of the N-channel MOS transistor and a protection transistor with a source and a gate connected to one power supply line of the high-potential power supply line and the low-potential power supply line and a drain connected to the output terminal, a conductivity type of the protection transistor being the same as a conductivity type of one MOS transistor of the P-channel MOS transistor and the N-channel MOS transistor, the source of the one MOS transistor being connected to the one power supply line.

Abstract: A semiconductor apparatus includes an internal circuit, a CMOS composed of a P-channel MOS transistor with a source connected to a high-potential power supply line and a gate connected to the internal circuit, and an N-channel MOS transistor with a source connected to a low-potential power supply line and a gate connected to the internal circuit, an output terminal connected to a drain of the P-channel MOS transistor and a drain of the N-channel MOS transistor and a protection transistor with a source and a gate connected to one power supply line of the high-potential power supply line and the low-potential power supply line and a drain connected to the output terminal, a conductivity type of the protection transistor being the same as a conductivity type of one MOS transistor of the P-channel MOS transistor and the N-channel MOS transistor, the source of the one MOS transistor being connected to the one power supply line.